Add device tree schema for the Realtek RTL9300 switches. The RTL9300 family is made up of the RTL9301, RTL9302B, RTL9302C and RTL9303. These have the same SoC differ in the Ethernet switch/SERDES arrangement. Currently the only supported features are the syscon-reboot and i2c controllers. The syscon-reboot is needed to be able to reboot the board. The I2C controllers are slightly unusual because they each own an SCL pin (GPIO 8 for the first controller, GPIO 17 for the second) but have 8 common SDA pins which can be assigned to either controller (but not both). Signed-off-by: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx> --- This is my initial attempt at addressing Krzysztof's comments from my two series. I expect there may still be a bit of discussion on the binding so I'm just sending this on it's own rather than the whole series. .../bindings/i2c/realtek,rtl9300-i2c.yaml | 98 ++++++++++++++++ .../bindings/mfd/realtek,rtl9300-switch.yaml | 110 ++++++++++++++++++ 2 files changed, 208 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/realtek,rtl9300-i2c.yaml create mode 100644 Documentation/devicetree/bindings/mfd/realtek,rtl9300-switch.yaml diff --git a/Documentation/devicetree/bindings/i2c/realtek,rtl9300-i2c.yaml b/Documentation/devicetree/bindings/i2c/realtek,rtl9300-i2c.yaml new file mode 100644 index 000000000000..e8cf328b2710 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/realtek,rtl9300-i2c.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/realtek,rtl9300-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek RTL I2C Controller + +maintainers: + - Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx> + +description: + The RTL9300 SoC has two I2C controllers. Each of these has an SCL line (which + if not-used for SCL can be a GPIO). There are 8 common SDA lines that can be + assigned to either I2C controller. + +properties: + compatible: + items: + - enum: + - realtek,rtl9301-i2c + - realtek,rtl9302b-i2c + - realtek,rtl9302c-i2c + - realtek,rtl9303-i2c + - const: realtek,rtl9300-i2c + + reg: + description: Register offset and size this I2C controller. + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + '^i2c@[0-7]$': + $ref: /schemas/i2c/i2c-controller.yaml + unevaluatedProperties: false + + properties: + reg: + description: The SDA pin associated with the I2C bus. + maxItems: 1 + + required: + - reg + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + i2c@36c { + compatible = "realtek,rtl9302c-i2c", "realtek,rtl9300-i2c"; + reg = <0x36c 0x14>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + gpio@20 { + compatible = "nxp,pca9555"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; + }; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + gpio@20 { + compatible = "nxp,pca9555"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; + }; + }; + + i2c@388 { + compatible = "realtek,rtl9302c-i2c", "realtek,rtl9300-i2c"; + reg = <0x388 0x14>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/realtek,rtl9300-switch.yaml b/Documentation/devicetree/bindings/mfd/realtek,rtl9300-switch.yaml new file mode 100644 index 000000000000..713cf3211569 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/realtek,rtl9300-switch.yaml @@ -0,0 +1,110 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/realtek,rtl9300-switch.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek Switch with Internal CPU + +maintainers: + - Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx> + +description: + The RTL9302 is an Ethernet switch with an integrated CPU. A number of + different peripherals are accessed through a common register block, + represented here as a syscon node. + +properties: + compatible: + items: + - enum: + - realtek,rtl9301-switch + - realtek,rtl9302b-switch + - realtek,rtl9302c-switch + - realtek,rtl9303-switch + - const: realtek,rtl9300-switch + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + reboot: + $ref: /schemas/power/reset/syscon-reboot.yaml# + + i2c: + $ref: /schemas/i2c/realtek,rtl9300-i2c.yaml# + +required: + - compatible + - reg + - reboot + +additionalProperties: false + +examples: + - | + ethernet-switch@1b000000 { + compatible = "realtek,rtl9302c-switch", "realtek,rtl9300-switch", "syscon", "simple-mfd"; + reg = <0x1b000000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + + reboot@c { + compatible = "syscon-reboot"; + reg = <0x0c 0x4>; + offset = <0x0c>; + value = <0x01>; + }; + + i2c@36c { + compatible = "realtek,rtl9302c-i2c", "realtek,rtl9300-i2c"; + reg = <0x36c 0x14>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + gpio@20 { + compatible = "nxp,pca9555"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; + }; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + gpio@20 { + compatible = "nxp,pca9555"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; + }; + }; + + i2c@388 { + compatible = "realtek,rtl9302c-i2c", "realtek,rtl9300-i2c"; + reg = <0x388 0x14>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + gpio@20 { + compatible = "nxp,pca9555"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; + }; + }; + }; + -- 2.46.1
