Re: MCEs on MIPS: multiple matching TLB entries

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在2024年7月1日七月 上午2:23,Yu Zhao写道:
> On Sun, Jun 30, 2024 at 11:25 AM Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> wrote:
>>
>>
>>
>> 在2024年6月30日六月 上午4:01,Jiaxun Yang写道:
>> > 在2024年6月30日六月 上午3:22,Jiaxun Yang写道:
>> >> 在2024年6月28日六月 下午6:57,Yu Zhao写道:
>> >>> Hi,
>> >>>
>> >>> OpenWrt folks ran into MCEs caused by multiple matching TLB entries
>> >>> [1], after they updated their kernel from v6.1 to v6.6.
>> >>>
>> >>> I reported similar crashes previously [2], on v6.4. So they asked me
>> >>> whether I'm aware of a fix from the mainline, which I am not.
>> >>> on
>> >>> I took a quick look from the MM's POV and found nothing obviously
>> >>> wrong. I'm hoping they have better luck with the MIPS experts.
>> >>
>> >> Hi Yu,
>> >>
>> >> I never hit such problem on my (non-bcm) 74Kc systems.
>> >>
>> >> However a quick glance suggested it may be related to Wired TLB entries
>> >> on your platform.
>> >>
>> >> Both duplicated TLB entries, Index 2 and 3, are all below "Wired" setting,
>> >> which means they are not managed by mm, but platform code.
>> >
>> > I just tried to dig into bcm47xx platform code and I think we should blame
>> > bcm47xx_prom_highmem_init, which created wired entry for high mem and may
>> > conflict with kernel's mapping.
>> >
>> > Nowadays, MIPS mm code can handle highmem on it's own, so there is no need
>> > to create such entry IMO.
>>
>> Sorry, I think I made a wrong diagnoses, it's actually a problem in our cache
>> alias code.
>>
>> Will try to fix.
>
> Thanks for looking into this!

So it's a problem incurred by OpenWRT's down stream patch rather than upstream code.

This is sorted at: https://github.com/openwrt/openwrt/pull/15635 

No further action required :-)

Thanks
-- 
- Jiaxun





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