在2024年1月5日一月 下午1:42，Xiaochuan Mao写道： > from 2k500/2k1000 mannual known that the offset value between > the interrupt status register and the interrupt entry register > is 0x20. I recall this offset is a workaround offered by Loongson staff. INTISR0 register offered by manual is not really functional on 2K1000 MIPS Could you please investigate with hardware folks? Thanks > > Signed-off-by: Xiaochuan Mao <maoxiaochuan@xxxxxxxxxxx> > --- > drivers/irqchip/irq-loongson-liointc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/irqchip/irq-loongson-liointc.c > b/drivers/irqchip/irq-loongson-liointc.c > index e4b33aed1c97..417b4c91ca67 100644 > --- a/drivers/irqchip/irq-loongson-liointc.c > +++ b/drivers/irqchip/irq-loongson-liointc.c > @@ -28,7 +28,7 @@ > > #define LIOINTC_INTC_CHIP_START 0x20 > > -#define LIOINTC_REG_INTC_STATUS (LIOINTC_INTC_CHIP_START + 0x20) > +#define LIOINTC_REG_INTC_STATUS (LIOINTC_INTC_CHIP_START) > #define LIOINTC_REG_INTC_EN_STATUS (LIOINTC_INTC_CHIP_START + 0x04) > #define LIOINTC_REG_INTC_ENABLE (LIOINTC_INTC_CHIP_START + 0x08) > #define LIOINTC_REG_INTC_DISABLE (LIOINTC_INTC_CHIP_START + 0x0c) > -- > 2.17.1 -- - Jiaxun
