On Tue, Dec 12, 2023 at 05:34:33PM +0100, Gregory CLEMENT wrote: > The code clearing BSS already use macro or use correct instruction > depending if the CPU is 32 bits or 64 bits. However, a few > instructions remained 32 bits only. > > By using the accurate MACRO, it is now possible to deal with memory > address beyond 32 bits. As a side effect, when using 64bits processor, > it also divides the loop number needed to clear the BSS by 2. > > Reviewed-by: Philippe Mathieu-Daudé <philmd@xxxxxxxxxx> > Reviewed-by: Florian Fainelli <florian.fainelli@xxxxxxxxxxxx> > Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx> > --- > arch/mips/boot/compressed/head.S | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/mips/boot/compressed/head.S b/arch/mips/boot/compressed/head.S > index 5795d0af1e1b2..d237a834b85ee 100644 > --- a/arch/mips/boot/compressed/head.S > +++ b/arch/mips/boot/compressed/head.S > @@ -25,8 +25,8 @@ > /* Clear BSS */ > PTR_LA a0, _edata > PTR_LA a2, _end > -1: sw zero, 0(a0) > - addiu a0, a0, 4 > +1: PTR_S zero, 0(a0) > + PTR_ADDIU a0, a0, PTRSIZE > bne a2, a0, 1b > > PTR_LA a0, (.heap) /* heap address */ > -- > 2.42.0 applied to mips-next. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]
