Add DT schema bindings for the EyeQ5 clock controller driver. Signed-off-by: Théo Lebrun <theo.lebrun@xxxxxxxxxxx> --- .../bindings/clock/mobileye,eyeq5-clk.yaml | 83 ++++++++++++++++++++++ MAINTAINERS | 2 + include/dt-bindings/clock/mobileye,eyeq5-clk.h | 22 ++++++ 3 files changed, 107 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml b/Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml new file mode 100644 index 000000000000..d56482a06bf1 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mobileye,eyeq5-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mobileye EyeQ5 clock controller + +description: + The EyeQ5 clock controller handles 10 read-only PLLs derived from the main + crystal clock. It also exposes one divider clock, a child of one of the PLLs. + It is custom to this platform, its registers live in a shared region called + OLB. + +maintainers: + - Grégory Clement <gregory.clement@xxxxxxxxxxx> + - Théo Lebrun <theo.lebrun@xxxxxxxxxxx> + - Vladimir Kondratiev <vladimir.kondratiev@xxxxxxxxxxxx> + +properties: + $nodename: + pattern: "^clocks$" + description: + We have no unique address, we rely on OLB. + + compatible: + const: mobileye,eyeq5-clk + + "#clock-cells": + const: 1 + + clocks: + maxItems: 1 + description: + Input parent clock to all PLLs. Expected to be the main crystal. + + clock-names: + items: + - const: ref + + mobileye,olb: + $ref: /schemas/types.yaml#/definitions/phandle + description: + A phandle to the OLB syscon. This is a fallback to using the parent as + syscon node. + +required: + - compatible + - "#clock-cells" + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + olb@e00000 { + compatible = "mobileye,eyeq5-olb", "syscon", "simple-mfd"; + reg = <0xe00000 0x400>; + reg-io-width = <4>; + + clocks { + compatible = "mobileye,eyeq5-clk"; + #clock-cells = <1>; + clocks = <&xtal>; + clock-names = "ref"; + }; + }; + + - | + olb: olb@e00000 { + compatible = "mobileye,eyeq5-olb", "syscon", "simple-mfd"; + reg = <0xe00000 0x400>; + reg-io-width = <4>; + }; + + clocks { + compatible = "mobileye,eyeq5-clk"; + mobileye,olb = <&olb>; + #clock-cells = <1>; + clocks = <&xtal>; + clock-names = "ref"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 4a7bd6b40d74..7f04fa760a4d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14552,10 +14552,12 @@ M: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx> M: Théo Lebrun <theo.lebrun@xxxxxxxxxxx> L: linux-mips@xxxxxxxxxxxxxxx S: Maintained +F: Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml F: Documentation/devicetree/bindings/mips/mobileye.yaml F: arch/mips/boot/dts/mobileye/ F: arch/mips/configs/generic/board-eyeq5.config F: arch/mips/generic/board-epm5.its.S +F: include/dt-bindings/clock/mobileye,eyeq5-clk.h F: include/dt-bindings/soc/mobileye,eyeq5.h MODULE SUPPORT diff --git a/include/dt-bindings/clock/mobileye,eyeq5-clk.h b/include/dt-bindings/clock/mobileye,eyeq5-clk.h new file mode 100644 index 000000000000..7aa974354bb6 --- /dev/null +++ b/include/dt-bindings/clock/mobileye,eyeq5-clk.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (C) 2023 Mobileye Vision Technologies Ltd. + */ + +#ifndef _DT_BINDINGS_CLOCK_MOBILEYE_EYEQ5_CLK_H +#define _DT_BINDINGS_CLOCK_MOBILEYE_EYEQ5_CLK_H + +#define EQ5C_PLL_CPU 0 +#define EQ5C_PLL_VMP 1 +#define EQ5C_PLL_PMA 2 +#define EQ5C_PLL_VDI 3 +#define EQ5C_PLL_DDR0 4 +#define EQ5C_PLL_PCI 5 +#define EQ5C_PLL_PER 6 +#define EQ5C_PLL_PMAC 7 +#define EQ5C_PLL_MPC 8 +#define EQ5C_PLL_DDR1 9 + +#define EQ5C_DIV_OSPI 10 + +#endif -- 2.43.0
