在2023年12月1日十二月 上午10:34，Gregory CLEMENT写道： > "Jiaxun Yang" <jiaxun.yang@xxxxxxxxxxx> writes: > >> 在2023年11月23日十一月 下午3:26，Gregory CLEMENT写道： >>> Introduce support for the MIPS based Mobileye EyeQ5 SoCs. >>> >>> Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx> >>> --- >> [...] >>> diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig >>> index 7dc5b3821cc6e..04e1fc6f789b5 100644 >>> --- a/arch/mips/generic/Kconfig >>> +++ b/arch/mips/generic/Kconfig >>> @@ -48,6 +48,13 @@ config SOC_VCOREIII >>> config MSCC_OCELOT >>> bool >>> >>> +config SOC_EYEQ5 >>> + select ARM_AMBA >>> + select WEAK_ORDERING >>> + select WEAK_REORDERING_BEYOND_LLSC >>> + select PHYSICAL_START_BOOL >>> + bool >> >> ^ I believe WEAK_ORDERING is already selected by MIPS_CPS, > > But MIPS_CPS can be disabled: it is not selected by > MIPS_GENERIC_KERNEL. IMO if MIPS_CPS is not select then there is no SMP support on this platform. WEAK_ORDERING only make sense for SMP system. > >> and WEAK_REORDERING_BEYOND_LLSC should be selected by MIPS_CPS as well. > > WEAK_REORDERING_BEYOND_LLSC is only selected by CPU_LOONGSON64 for > now not by MIPS_CPS I believe this applies to all SMP cores from MTI, I'll check with hardware folks. Thanks - Jiaxun > > Thanks, > > Gregory >> >> Thanks >> -- >> - Jiaxun > > -- > Gregory Clement, Bootlin > Embedded Linux and Kernel engineering > http://bootlin.com -- - Jiaxun
