Re: [PATCH v5 4/7] usb: dwc3: dwc3-octeon: Avoid half-initialized controller state

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Tue, Aug 01, 2023, Ladislav Michl wrote:
> On Tue, Aug 01, 2023 at 07:37:37AM +0200, Ladislav Michl wrote:
> > Anyway, what about just passing octeon into dwc3_octeon_config_gpio
> > and use all that dirty magic inside. Would that work work for you?
> 
> Something like this:
> 
> [PATCH] usb: dwc3: dwc3-octeon: Consolidate pinmux configuration
> 
> As there is no pinctrl driver for Octeon, pinmux configuration is done
> in dwc3_octeon_config_gpio function. It has been always done the tricky
> way: there are two UCTLs; first at 0x1180068000000 and second at
> 0x1180069000000, so address based test is used to get index to configure
> pin muxing, because DT does not provide that information.
> 
> To make pinmux configuration a little less hackish until proper solution
> is developed, move all its logic into dwc3_octeon_config_gpio function.
> ---
>  drivers/usb/dwc3/dwc3-octeon.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/usb/dwc3/dwc3-octeon.c b/drivers/usb/dwc3/dwc3-octeon.c
> index 90e1ae66769f..f35dca899d6e 100644
> --- a/drivers/usb/dwc3/dwc3-octeon.c
> +++ b/drivers/usb/dwc3/dwc3-octeon.c
> @@ -206,9 +206,10 @@ static inline void dwc3_octeon_writeq(void __iomem *base, uint64_t val)
>  	cvmx_writeq_csr(base, val);
>  }
>  
> -static void dwc3_octeon_config_gpio(int index, int gpio)
> +static void dwc3_octeon_config_gpio(struct dwc3_octeon *octeon, int gpio)
>  {
>  	union cvmx_gpio_bit_cfgx gpio_bit;
> +	int index = ((__force uintptr_t)octeon->base >> 24) & 1;
>  
>  	if ((OCTEON_IS_MODEL(OCTEON_CN73XX) ||
>  	    OCTEON_IS_MODEL(OCTEON_CNF75XX))
> @@ -237,7 +238,7 @@ static inline uint64_t dwc3_octeon_readq(void __iomem *addr)
>  
>  static inline void dwc3_octeon_writeq(void __iomem *base, uint64_t val) { }
>  
> -static inline void dwc3_octeon_config_gpio(int index, int gpio) { }
> +static inline void dwc3_octeon_config_gpio(struct dwc3_octeon *octeon, int gpio) { }
>  
>  static uint64_t octeon_get_io_clock_rate(void)
>  {
> @@ -422,7 +423,7 @@ static int dwc3_octeon_setup(struct dwc3_octeon *octeon,
>  		val &= ~USBDRD_UCTL_HOST_PPC_EN;
>  	} else {
>  		val |= USBDRD_UCTL_HOST_PPC_EN;
> -		dwc3_octeon_config_gpio(((u64)octeon->base >> 24) & 1, power_gpio);
> +		dwc3_octeon_config_gpio(octeon, power_gpio);
>  		dev_dbg(dev, "power control is using gpio%d\n", power_gpio);
>  	}
>  	if (power_active_low)
> -- 
> 2.39.2
> 

No, it doesn't make it any better. Let's revisit this later.

Thanks,
Thinh




[Index of Archives]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux