On Fri, Jun 23, 2023 at 2:18 AM Shiji Yang <yangshiji66@xxxxxxxxxxx> wrote: > > Recently, A new clock and reset controller driver has been introduced to > the ralink mips target[1]. It provides proper system control and adds more > SoC specific compatible strings. In order to better initialize CPUs, this > patch removes the outdated "ralink,mt7620a-sysc" and add all dt-binding > documented compatible strings to the system controller match table. > > [1] https://lore.kernel.org/all/20230619040941.1340372-1-sergio.paracuellos@xxxxxxxxx/ > > Signed-off-by: Shiji Yang <yangshiji66@xxxxxxxxxxx> > --- > arch/mips/ralink/of.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) Reviewed-by: Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx> Thanks, Sergio Paracuellos
