On Thu, Jun 22, 2023 at 8:56 AM Nathan Chancellor <nathan@xxxxxxxxxx> wrote:
>
> Clang warns:
>
> drivers/clk/ralink/clk-mtmips.c:309:9: error: variable 'ret' is uninitialized when used here [-Werror,-Wuninitialized]
> 309 | return ret;
> | ^~~
> drivers/clk/ralink/clk-mtmips.c:285:9: note: initialize the variable 'ret' to silence this warning
> 285 | int ret, i;
> | ^
> | = 0
> drivers/clk/ralink/clk-mtmips.c:359:9: error: variable 'ret' is uninitialized when used here [-Werror,-Wuninitialized]
> 359 | return ret;
> | ^~~
> drivers/clk/ralink/clk-mtmips.c:335:9: note: initialize the variable 'ret' to silence this warning
> 335 | int ret, i;
> | ^
> | = 0
> 2 errors generated.
>
> Set ret to the return value of clk_hw_register_fixed_rate() using the
> PTR_ERR() macro, which ensures ret is not used uninitialized, clearing
> up the warning.
>
> Fixes: 6f3b15586eef ("clk: ralink: add clock and reset driver for MTMIPS SoCs")
> Closes: https://github.com/ClangBuiltLinux/linux/issues/1879
> Signed-off-by: Nathan Chancellor <nathan@xxxxxxxxxx>
Thanks for the patch!
PTR_ERR returns a long; assigning to an int risks truncation of the
error. The use of PTR_ERR on L1079 has a similar risk...]
Maybe Sergio wants to revisit that in more detail, but this at least
fixes the build for us.
Reviewed-by: Nick Desaulniers <ndesaulniers@xxxxxxxxxx>
> ---
> drivers/clk/ralink/clk-mtmips.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/clk/ralink/clk-mtmips.c b/drivers/clk/ralink/clk-mtmips.c
> index 9322c6210a33..1e7991439527 100644
> --- a/drivers/clk/ralink/clk-mtmips.c
> +++ b/drivers/clk/ralink/clk-mtmips.c
> @@ -292,6 +292,7 @@ static int mtmips_register_fixed_clocks(struct clk_hw_onecell_data *clk_data,
> sclk->parent, 0,
> sclk->rate);
> if (IS_ERR(sclk->hw)) {
> + ret = PTR_ERR(sclk->hw);
> pr_err("Couldn't register fixed clock %d\n", idx);
> goto err_clk_unreg;
> }
> @@ -342,6 +343,7 @@ static int mtmips_register_factor_clocks(struct clk_hw_onecell_data *clk_data,
> sclk->parent, sclk->flags,
> sclk->mult, sclk->div);
> if (IS_ERR(sclk->hw)) {
> + ret = PTR_ERR(sclk->hw);
> pr_err("Couldn't register factor clock %d\n", idx);
> goto err_clk_unreg;
> }
>
> ---
> base-commit: fd99ac5055d4705e91c73d1adba18bc71c8511a8
> change-id: 20230622-mips-ralink-clk-wuninitialized-150bd0336187
>
> Best regards,
> --
> Nathan Chancellor <nathan@xxxxxxxxxx>
>
--
Thanks,
~Nick Desaulniers
