> 2023年5月16日 16:05，Maciej W. Rozycki <macro@xxxxxxxxxxx> 写道： > > On Fri, 7 Apr 2023, Jiaxun Yang wrote: > >> MIPS MT ASE is only available on ISA between Release 1 and Release 5. >> Add ISA level dependency to Kconfig to fix build. > > Actually the MIPS MT ASE is explicitly from R2 onwards only[1] and it has > *not* been withdrawn as at R6[2]. Thanks for the info! I’m a little bit confused with relationship of MT and VP though, I thought VP suppressed MT, and they look conflicting, does it mean there are two possible ways of multithreading in R6? If so I’d probably rewrite cps-sec in uasm to take that into account, sigh. Thanks - Jiaxun > > NB I was onboard with MTI when the MT ASE was introduced (I was a member > of the 34K team, working on CPU bringup), so I know this stuff first hand. > > References: > > [1] "MIPS32 Architecture for Programmers, VolumeIV-f: The MIPS MT > Application-Specific Extension to the MIPS32 Architecture", MIPS > Technologies, Inc., Document Number: MD00378, Revision 1.00, > September 28, 2005, Section 1.1 "Background", p. 1 > > [2] "MIPS32 Architecture For Programmers, Volume I-A: Introduction to the > MIPS32 Architecture", Imagination Technologies LTD., Document Number: > MD00082, Revision 6.01, August 20, 2014, Chapter 1 "About This Book", > p. 12 > > Maciej
