Re: [PATCH v2 6/7] MIPS: Fallback CPU -march CFLAG to ISA level if unsupported

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> 2023年4月20日 17:32,Nick Desaulniers <ndesaulniers@xxxxxxxxxx> 写道:
> 
> On Wed, Apr 19, 2023 at 3:15 PM Thomas Bogendoerfer
> <tsbogend@xxxxxxxxxxxxxxxx> wrote:
>> 
>> On Wed, Apr 19, 2023 at 02:35:02PM -0700, Nick Desaulniers wrote:
>>> On Wed, Apr 19, 2023 at 9:50 AM Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> wrote:
>>>> 
>>>> 
>>>> 
>>>>> 2023年4月18日 21:07,Nick Desaulniers <ndesaulniers@xxxxxxxxxx> 写道:
>>>>> 
>>>>> On Fri, Apr 14, 2023 at 1:07 AM Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> wrote:
>>>>>> 
>>>>>> LLVM does not implement some of -march options. However those options
>>>>>> are not mandatory for kernel to build for those CPUs.
>>>>>> 
>>>>>> Fallback -march CFLAG to ISA level if unsupported by toolchain so
>>>>>> we can get those kernel to build with LLVM.
>>>>>> 
>>>>>> Link: https://github.com/ClangBuiltLinux/linux/issues/1544
>>>>>> Reported-by: Nathan Chancellor <nathan@xxxxxxxxxx>
>>>>>> Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
>>>>> 
>>>>> Thanks for the patch! Maybe it's more obvious to folks who work on
>>>>> mips, but how did you determine that say `p5600` is `mips32r5` or
>>>>> `r10000` is `mips4`?
>>>> 
>>>> Wikipedia [1] should fit the purpose.
>>>> 
>>>> [1]: https://en.wikipedia.org/wiki/List_of_MIPS_architecture_processors
>>> 
>>> Mostly! Though I was not able to verify:
>>> - p5600
>> 
>> mips32r5
>> 
>>> - r5500
>> 
>> mips4
>> 
>>> - rm5200
>> 
>> mips4
>> 
>>> - sb1
>> 
>> mips64r1
> 
> Thomas, thanks for reviewing datasheets to verify this.
> 
> Jiaxun, for SB1, you have cc-option fall back to -march=mips4, does
> that need to be -march=mips64r1?

Yep, my bad, was reading the manual wrong.

Will fix in next rev.

Thanks.
- Jiaxun



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