Hey Thomas,
I'm digging deeper into this and understand less of it :)
For one, we currently use both ioread32 (our timer driver for example)
and ioread32be (our GPIO driver) and thus both variants of register
access I would think without problems.
I also see that a few devices override? (is that possible at all)
mangle-port.h, though I didn't dig into this too much, just noticed some
other boards with those headers. Is this an option at all? just supply a
SoC specific mangle-port.h?
Loonking at mangle-port.h (and only at the 32 bit case), basically,
there's ioswabl and __mem_ioswabl that I should be concerned about.
Grepping for those functions however, only yields me one result, where
__relaxed_ioswabl gets defined to __ioswabl, __mem_iosawbl is unused.
Even more frustrating, is that git grep also doesn't find a user for
__relaxed_ioswabl. I'm sure there's some non-greppable magic missing :)
as the failures of setting this define of course are real.
So to further my search, how does this work then?
Olliver
On 19-02-2023 17:07, Olliver Schinagl wrote:
Hey Thomas,
On 19-02-2023 11:31, Thomas Bogendoerfer wrote:
On Sun, Feb 19, 2023 at 10:27:17AM +0100, Olliver Schinagl wrote:
It's still odd though; as we do not have _anything_ PCI, but it
SWAP_IO_SPACE causes the crash.
but something uses readX/write() calls. If you aren't using any driver
existing driver but only newly written dedicated for that SOC
you could use raw_read/raw_writeX() instead. These type of functions
are always using native endianess.
Ok that is valueable information. I think currently the only driver
(that I can think of right now) that we use 'off the shelf' is the uart
driver, so I hope that's written cleanly :)
As for readX/writeX, for sure that is being used, and I intended to
refactor that while going to proper and clean drivers (the realtek
support in openwrt is a big mess right now).
So you say raw_readX, but what about ioread32 which I thought was preferred?
I'll meanwhile read into what readX vs raw_readX to learn more with
regards to endianess.
Thank you so mcuh so far!
What makes SWAP_IO_SPACE generic then? :)
als long as hardware presents memory used with readX/writeX is
seen as little endian independant from CPU endianess it's generic.
'little endian independent'? What does that mean, that the register maps
follow the CPU endianess?
Thomas.
