On Sun, Jan 15, 2023 at 01:19:22PM +0100, Sander Vanheule wrote:
> The CPUs in these SoCs support MIPS32 R2, and allow ebase relocation.
> Even if the default exception base of 0x80000000 is used, the
> MIPS_GENERIC load address of 0x80100000 leaves sufficient space to not
> need an extra 0x400 bytes of padding.
>
> Suggested-by: Olliver Schinagl <oliver@xxxxxxxxxxx>
> Signed-off-by: Sander Vanheule <sander@xxxxxxxxxxxxx>
> ---
> Olliver has suggested to make this change, in order to reduce the delta
> with a fully generic MIPS kernel.
> I hope the patch description makes sense, as I based the argumentation
> on the behaviour of the code, and similar commits 7d6d28377783 ("MIPS:
> Loongson64: select NO_EXCEPT_FILL") and dd54dedd947d ("MIPS: BCM47XX:
> select NO_EXCEPT_FILL"). The change was tested on an RTL8380 and an
> RTL8393 device, where it appears to work as expected.
>
> Best,
> Sander
>
> arch/mips/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index 2db5c853992e..a8895aaa490e 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -627,6 +627,7 @@ config MACH_REALTEK_RTL
> select IRQ_MIPS_CPU
> select CEVT_R4K
> select CSRC_R4K
> + select NO_EXCEPT_FILL
> select SYS_HAS_CPU_MIPS32_R1
> select SYS_HAS_CPU_MIPS32_R2
> select SYS_SUPPORTS_32BIT_KERNEL
> --
> 2.39.0
applied to mips-next.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
