On Mon, 5 Apr 2021, Ilya Lipnitskiy wrote:
> diff --git a/arch/mips/include/asm/mips-cps.h b/arch/mips/include/asm/mips-cps.h
> index fd43d876892e..9f495ffef2b7 100644
> --- a/arch/mips/include/asm/mips-cps.h
> +++ b/arch/mips/include/asm/mips-cps.h
> @@ -165,11 +167,29 @@ static inline uint64_t mips_cps_cluster_config(unsigned int cluster)
> */
> static inline unsigned int mips_cps_numcores(unsigned int cluster)
> {
> + struct cpulaunch *launch;
> + unsigned int ncores;
> +
> if (!mips_cm_present())
> return 0;
>
> /* Add one before masking to handle 0xff indicating no cores */
> - return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
> + ncores = (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
> +
> + if (IS_ENABLED(CONFIG_SOC_MT7621)) {
> + /*
> + * Ralink MT7621S SoC is single core, but the GCR_CONFIG method
> + * always reports 2 cores. Check the second core's LAUNCH_FREADY
> + * flag to detect if the second core is missing. This method
> + * only works before the core has been started.
> + */
> + launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
> + launch += 2; /* MT7621 has 2 VPEs per core */
> + if (!(launch->flags & LAUNCH_FREADY))
> + ncores = 1;
> + }
> +
> + return ncores;
> }
>
> /**
Much better to me, but please move the declaration of `launch' into the
conditional block, which is the only place that uses it.
Maciej
