Re: logical PIO code for mips question (was Re: [PATCH RESEND v3 3/3] MIPS: Loongson64: Enable PCI_IO_VMMAP)

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在 2021/1/14 上午2:02, John Garry 写道:
On 08/05/2020 12:44, Jiaxun Yang wrote:

Replying to an old mail ...

range->fwnode = &of_root->fwnode;
+    range->size = MMIO_LOWER_RESERVED;
+    range->hw_start = LOONGSON_PCIIO_BASE;
+    range->flags = LOGIC_PIO_CPU_MMIO;
+
+    if (logic_pio_register_range(range)) {
+        pr_err("Failed to reserve PIO range for legacy ISA\n");
+        goto free_range;
+    }

Hi Jiaxun,

+
+    if (WARN(range->io_start != 0,
+            "Reserved PIO range does not start from 0\n"))

Do the mips code still rely on this check?
Hi John,

Yes :-/


I was considering changing the logical PIO code to reserve the first 64K of PCI MMIO space, but making that change would break this code as things stand.

The motivation is that some drivers, like [0], access IO ports unconditionally and can kill systems when no PCI host exists. By reserving the first 64K, accesses by those drivers could nullified.

Actually we're trying to deal with almost the same problem.
The reserved region on MIPS is used to serve these driver that access
I/O ports bypassing resource subsystem.

Thanks.

- Jiaxun


Thanks,
John

[0] https://lore.kernel.org/linux-input/20210112055129.7840-1-song.bao.hua@xxxxxxxxxxxxx/T/#t

+        goto unregister;
+
+    /*
+     * i8259 would access I/O space, so mapping must be done here.
+     * Please remove it when all drivers can be managed by logic_pio.
+     */
+    ioremap_page_range(PCI_IO_START, PCI_IO_START + MMIO_LOWER_RESERVED,
+                LOONGSON_PCIIO_BASE,
+                pgprot_device(PAGE_KERNEL));
+
+    return;
+unregister:





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