H, Thomas, On Tue, Sep 15, 2020 at 1:23 AM Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> wrote: > > > > 在 2020/9/14 19:11, Thomas Bogendoerfer 写道: > > On Mon, Sep 07, 2020 at 06:06:08PM +0800, Huacai Chen wrote: > >> diff --git a/arch/mips/boot/compressed/head.S b/arch/mips/boot/compressed/head.S > >> index 409cb48..9fc88ec 100644 > >> --- a/arch/mips/boot/compressed/head.S > >> +++ b/arch/mips/boot/compressed/head.S > >> @@ -14,11 +14,16 @@ > >> > >> #include <asm/asm.h> > >> #include <asm/regdef.h> > >> +#include <asm/mipsregs.h> > >> > >> .set noreorder > >> .cprestore > >> LEAF(start) > >> start: > >> + mfc0 t0, CP0_STATUS > >> + or t0, ST0_KERNEL_CUMASK > >> + mtc0 t0, CP0_STATUS > >> + > >> /* Save boot rom start args */ > >> move s0, a0 > >> move s1, a1 > > please to compiler flags in arch/mips/boot/compressed/Makefile to > > disable generation of instruction not supported, if CU2 is disabled > > (and don't forget about 2ef). > > I don't think it's worthy to have different CFLAGS between zboot and rest of > the kernel. > > On GCC version prior to 9, there is no flag to control the generation of > these instructions, unless drop supplied "-march=loongson3a" option, > that's messy and unreliable for Makefile. > > By contrast, enabling CU2 in zboot have no side effect. Some firmware even > did it in early ROM initilization stage. What do you think about? I agree with Jiaxun, but disable lq/sq in zboot is also acceptable for me. Huacai > > Thanks. > > - Jiaxun > > > > > Rest of the patch LGTM. > > > > Thomas. > >
