Re: [PATCH V6 2/3] MIPS: Loongson-3: Enable COP2 usage in kernel

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On Mon, Sep 07, 2020 at 06:06:08PM +0800, Huacai Chen wrote:
> 
> diff --git a/arch/mips/boot/compressed/head.S b/arch/mips/boot/compressed/head.S
> index 409cb48..9fc88ec 100644
> --- a/arch/mips/boot/compressed/head.S
> +++ b/arch/mips/boot/compressed/head.S
> @@ -14,11 +14,16 @@
>  
>  #include <asm/asm.h>
>  #include <asm/regdef.h>
> +#include <asm/mipsregs.h>
>  
>  	.set noreorder
>  	.cprestore
>  	LEAF(start)
>  start:
> +	mfc0    t0, CP0_STATUS
> +	or	t0, ST0_KERNEL_CUMASK
> +	mtc0    t0, CP0_STATUS
> +
>  	/* Save boot rom start args */
>  	move	s0, a0
>  	move	s1, a1

please to compiler flags in arch/mips/boot/compressed/Makefile to
disable generation of instruction not supported, if CU2 is disabled
(and don't forget about 2ef).

Rest of the patch LGTM.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]



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