[PATCH 1/3] MIPS: add missing MSACSR and upper MSA initialization

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own_fp_inatomic() does not restore/initialize MSACSR and upper MSA regs, so
MSACSR and MSA upper regs's value from previous task on current cpu can leak
into current task and cause unpredictable behavior when MSA context not
initialized.

Signed-off-by: Huang Pei <huangpei@xxxxxxxxxxx>
---
 arch/mips/kernel/traps.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 38aa07ccdbcc..99a8f1b7b522 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1287,6 +1287,8 @@ static int enable_restore_fp_context(int msa)
 		err = own_fpu_inatomic(1);
 		if (msa && !err) {
 			enable_msa();
+			write_msa_csr(current->thread.fpu.msacsr);
+			init_msa_upper();
 			set_thread_flag(TIF_USEDMSA);
 			set_thread_flag(TIF_MSA_CTX_LIVE);
 		}
-- 
2.17.1




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