Re: [PATCH V3 1/2] MIPS: Loongson-3: Enable COP2 usage in kernel

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在 2020/8/10 22:12, Thomas Bogendoerfer 写道:
On Sun, Aug 09, 2020 at 10:53:13PM +0800, Jiaxun Yang wrote:
Thus we still need to enable CU2 with exception for user space, and we can
always enable CU2 in
kernel since kernel won't be compiled with hard-float. :-)
I see, how about the patch below
That looks fine for me.
Is it good with you, Huacai?

Thanks.

- Jiaxun


Thomas.


diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 4ddc12e4444a..f7144116b43b 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -389,6 +389,13 @@
  #define ST0_CU3			0x80000000
  #define ST0_XX			0x80000000	/* MIPS IV naming */
+/* in-kernel enabled CUs */
+#ifdef CONFIG_CPU_LOONGSOON64
+#define ST0_KERNEL_CUMASK	(ST0_CU0 | ST_CU2)
+#else
+#define ST0_KERNEL_CUMASK	ST0_CU0
+#endif
+
  /*
   * Bitfields and bit numbers in the coprocessor 0 IntCtl register. (MIPSR2)
   */
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index 3e8d2aaf96af..aa430a6c68b2 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -450,7 +450,7 @@
   */
  		.macro	CLI
  		mfc0	t0, CP0_STATUS
-		li	t1, ST0_CU0 | STATMASK
+		li	t1, ST0_KERNEL_CUMASK | STATMASK
  		or	t0, t1
  		xori	t0, STATMASK
  		mtc0	t0, CP0_STATUS
@@ -463,7 +463,7 @@
   */
  		.macro	STI
  		mfc0	t0, CP0_STATUS
-		li	t1, ST0_CU0 | STATMASK
+		li	t1, ST0_KERNEL_CUMASK | STATMASK
  		or	t0, t1
  		xori	t0, STATMASK & ~1
  		mtc0	t0, CP0_STATUS
@@ -477,7 +477,7 @@
   */
  		.macro	KMODE
  		mfc0	t0, CP0_STATUS
-		li	t1, ST0_CU0 | (STATMASK & ~1)
+		li	t1, ST0_KERNEL_CUMASK | (STATMASK & ~1)
  #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
  		andi	t2, t0, ST0_IEP
  		srl	t2, 2
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 7dd234e788e6..61b73580b877 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -35,7 +35,7 @@
  	.macro	setup_c0_status set clr
  	.set	push
  	mfc0	t0, CP0_STATUS
-	or	t0, ST0_CU0|\set|0x1f|\clr
+	or	t0, ST0_KERNEL_CUMASK|\set|0x1f|\clr
  	xor	t0, 0x1f|\clr
  	mtc0	t0, CP0_STATUS
  	.set	noreorder
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index ff5320b79100..90b869297893 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -68,7 +68,7 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
  	unsigned long status;
/* New thread loses kernel privileges. */
-	status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
+	status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_CU2|ST0_FR|KU_MASK);
  	status |= KU_USER;
  	regs->cp0_status = status;
  	lose_fpu(0);
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index b95ef98fc847..f4362ac172c6 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -2190,7 +2190,7 @@ static void configure_status(void)
  	 * flag that some firmware may have left set and the TS bit (for
  	 * IP27).  Set XX for ISA IV code to work.
  	 */
-	unsigned int status_set = ST0_CU0;
+	unsigned int status_set = ST0_KERNEL_CUMASK;
  #ifdef CONFIG_64BIT
  	status_set |= ST0_FR|ST0_KX|ST0_SX|ST0_UX;
  #endif




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