On 7/31/20 2:05 AM, Thomas Bogendoerfer wrote:
> On Thu, Jul 30, 2020 at 09:24:01PM -0700, Florian Fainelli wrote:
>> Disable pref 30 by utilizing the standard quirk method and matching the
>> affected SoCs: 7344, 7346, 7425.
>>
>> Signed-off-by: Florian Fainelli <f.fainelli@xxxxxxxxx>
>> ---
>> arch/mips/bmips/setup.c | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/arch/mips/bmips/setup.c b/arch/mips/bmips/setup.c
>> index 19308df5f577..df0efea12611 100644
>> --- a/arch/mips/bmips/setup.c
>> +++ b/arch/mips/bmips/setup.c
>> @@ -110,6 +110,20 @@ static void bcm6368_quirks(void)
>> bcm63xx_fixup_cpu1();
>> }
>>
>> +static void bmips5000_pref30_quirk(void)
>> +{
>> + __asm__ __volatile__(
>> + " li $8, 0x5a455048\n"
>> + " .word 0x4088b00f\n" /* mtc0 $8, $22, 15 */
>> + " nop; nop; nop\n"
>> + " .word 0x4008b008\n" /* mfc0 $8, $22, 8 */
>> + /* disable "pref 30" on buggy CPUs */
>> + " lui $9, 0x0800\n"
>> + " or $8, $9\n"
>> + " .word 0x4088b008\n" /* mtc0 $8, $22, 8 */
>> + : : : "$8", "$9");
>
> what's the reason for not using mfc/mtc here ?
See my response to Jiaxun, thanks!
--
Florian
