It was found that some undocumented unprivileged instructions could crash the kernel with a "FTLB parity error" on Loongson-3A4000, but the error registers were garbage: [ 896.970419] FTLB error exception, cp0_ecc=0x00000002: [ 896.975446] cp0_errorepc == ffffffffffffffff [ 896.979755] c0_cacheerr == 00000000 [ 896.983277] Decoded c0_cacheerr: primary cache fault in insn reference. [ 896.989963] Cache error exception: [ 896.993396] cp0_errorepc == ffffffffffffffff [ 896.997707] c0_cacheerr == 00000000 [ 897.001228] Decoded c0_cacheerr: primary cache fault in insn reference. [ 897.007916] Error bits: [ 897.010467] IDX: 0x00000000 [ 897.013284] Kernel panic - not syncing: Can't handle the cache error! [ 897.019807] ---[ end Kernel panic - not syncing: Can't handle the cache error! ]--- Turns out the FTLBPar exception code is actually implementation-specific. On Loongson cores the exception is "GSExc" instead, and is non-fatal in Loongson's linux-3.10 fork. So we dynamically register the correct handler for the exception, and do not panic on the specific undocumented case. P.S. There is not much space left in the cpuinfo_mips.options flag. We should consider moving to something like x86's feature flags that is extensible. v4: - Added Reviewed-by tags from Huacai - Dropped bouncing Cc addresses from the first patch - Fixed "MFC0" -> "mfc0" in genex.S, as that CP0 register is 32-bit according to Loongson's manuals v3: - Simplified declaration of cpu_has_gsexcex, as suggested by Huacai v2: - Removed stray GSExc logic in cpu_probe_legacy, pointed out by Huacai WANG Xuerui (3): MIPS: only register FTLBPar exception handler for supported models MIPS: add definitions for Loongson-specific CP0.Diag1 register MIPS: handle Loongson-specific GSExc exception arch/mips/include/asm/cpu-features.h | 8 ++++++ arch/mips/include/asm/cpu.h | 2 ++ arch/mips/include/asm/mipsregs.h | 11 ++++++++ arch/mips/kernel/cpu-probe.c | 16 ++++++++++++ arch/mips/kernel/genex.S | 7 +++++ arch/mips/kernel/traps.c | 38 +++++++++++++++++++++++++++- 6 files changed, 81 insertions(+), 1 deletion(-) -- 2.25.1