Hello, No one can give me more information about these registers ? Thank you. Bets regards, Gaëtan Carlier. On 06/03/2014 10:32 AM, Gaëtan Carlier wrote:
Dear, I am back to add support of h.264 decoding using Coda DX6 on i.MX27 (after long months of inactivity). I base my work on driver from linux 2.6.22 (libvpu) and last coda.c from linux-next/master. When I send DEC_SEQ_INIT command, it fails but I don't know why. 1) Which internal buffers do Coda DX6 really have/used for decoding PARABUF, WORKBUF, PSBUF, ...) ? 2) What is their role ? 3) I see in some code that there is a command CODA_RET_DEC_SEQ_ERR_REASON (0x1E0), which has the same opcode has RET_DEC_SEQ_NEXT_FRAME_NUM, but when I run this command after DEC_SEQ_INIT, it returns 1 that does not seems to be correct error (regarding RetCode enum in vpu_lib.h in libvpu) Code is based on 3.6.0 kernel revision with some backport from more recent version of coda.c Thanks a lot for your help. Best regards, Gaëtan Carlier.
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