> -----Original Message----- > From: Issa Gorissen [mailto:flop.m@xxxxxxx] > Sent: mardi 4 octobre 2011 13:57 > To: o.endriss@xxxxxx; sr@xxxxxxxxx > Cc: 'Linux Media Mailing List' > Subject: RE: [DVB] CXD2099 - Question about the CAM clock > > > > > I managed to find a series of values that are working correctly for > MCLKI: > > > > MCLKI = 0x5554 - i * 0x0c > > > > In my case I can go down to 0x5338 before having TS errors. > > > > From CXD2099 specs > -- > It is a requirement for the frequency of MCLKI to be set higher than the > input data rate. ie 8 times TICLK. If this condition is not met then the > internal buffer will overflow and the register TSIN_FIFO_OVFL is set to > 1. This register should be read at regular intervals to ensure reliable > operation. > -- > > Watch out that you're not slowly overflowing the internal buffer if > MCLKI is not fast enough... That's the problem, if the input clock can't be slowed down... I didn't find any parameters that allows for decreasing the clock. > > Are you working with the ddbridge ? Yes, I'm working with the ddbridge (lattice) > > -- > Issa -- To unsubscribe from this list: send the line "unsubscribe linux-media" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html