Hi,
unfortunately nobody replied to me, so I contacted Mauro (thank you!)
and got some guidance.
According to http://www.linuxtv.org/wiki/index.php/Bus_snooping/sniffing
I sniffed my device
http://www.linuxtv.org/wiki/index.php/ADS_Tech_Instant_TV_(USBAV-704)
two times. Just in case. The outputs are not identical. Is it ok?
Please find both files attached. I could have adjusted em28xx_cards.c
by myself, but I know too little. So
can you please do it or give me hints if this takes too much time.
Best regards,
Roman
On Sat, Sep 25, 2010 at 13:28, Roman Byshko <rbyshko@xxxxxxxxx> wrote:
> Hi guys,
>
> I've just got an old TV Tuner hardware and wanted to get it working under
> Linux (SuSe 11.2). After a comprehensive look up in your wiki (wonderful
> source of information, however difficult to read for the newbies such as me)
> I've found my device there.
>
> It is ADS Instant TV (USBAV-704)
> (http://www.linuxtv.org/wiki/index.php/ADS_Tech_Instant_TV_(USBAV-704))
> .
> Unfortunately it stays there that the device is currently not supported.
> Though on the page below there is a sentece saying that development is in
> progress. The last update to this page was a year ago. So I decided to ask
> you whether there is any progress in supporting this device. Also, I would
> be glad to help you to get it working if you agree to be my patient mentors.
> Or you will advise me to throw this old device away and buy a new one, that
> is supported well already?
>
> Looking forward to you answers.
>
> Best regards,
> Roman
>
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 00 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 00 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 00 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 10 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 00 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 10 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 00 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 00 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 10 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 00 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 00 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 10 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 00 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
i2c_master_send(0xc6>>1, { 13 82 8e 02 b0 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x86>>1, { 00 16 70 49 }, 0x04);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
i2c_master_send(0xc6>>1, { 13 82 8e 02 b0 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x86>>1, { 00 16 70 49 }, 0x04);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
i2c_master_send(0xc6>>1, { 13 82 8e 02 b0 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x86>>1, { 00 16 70 49 }, 0x04);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
i2c_master_send(0xc6>>1, { 13 82 8e 02 b0 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x86>>1, { 00 16 70 49 }, 0x04);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x00);
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x00);
em28xx_read_reg(dev, EM28XX_R12_VINENABLE); /* read 0x27 */
em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
em28xx_read_reg(dev, EM28XX_R0C_USBSUSP); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x00);
i2c_master_send(0x4a>>1, { 02 c2 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
em28xx_write_reg(dev, 0x13, 0x08);
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x10);
em28xx_write_reg(dev, EM28XX_R27_OUTFMT, 0x34);
em28xx_write_reg(dev, EM28XX_R10_VINMODE, 0x00);
em28xx_write_reg(dev, EM28XX_R11_VINCTRL, 0x11);
em28xx_write_reg(dev, EM28XX_R28_XMIN, 0x01);
em28xx_write_reg(dev, EM28XX_R29_XMAX, 0xaf);
em28xx_write_reg(dev, EM28XX_R2A_YMIN, 0x01);
em28xx_write_reg(dev, EM28XX_R2B_YMAX, 0x47);
em28xx_write_reg(dev, EM28XX_R1C_HSTART, 0x08);
em28xx_write_reg(dev, EM28XX_R1D_VSTART, 0x00);
em28xx_write_reg(dev, EM28XX_R1E_CWIDTH, 0xb0);
em28xx_write_reg(dev, EM28XX_R1F_CHEIGHT, 0x48);
em28xx_read_reg(dev, EM28XX_R26_COMPR); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x10);
em28xx_write_reg16(dev, EM28XX_R30_HSCALELOW,0x1000);
i2c_master_send(0x4a>>1, { 01 08 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 03 30 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 06 e9 0d 88 01 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0a 80 47 40 00 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0f 2a }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 10 08 0c e7 00 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0a 80 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0e 01 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0xc6>>1, { 13 82 8e 02 b0 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x86>>1, { 00 16 70 49 }, 0x04);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 02 c2 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x14);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);
i2c_master_send(0x4a>>1, { 0d 00 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10);
em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x02);
em28xx_read_reg(dev, EM28XX_R26_COMPR); /* read 0x10 */
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x10);
i2c_master_send(0x4a>>1, { 1f }, 0x01);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x4a>>1, &buf, 0x01); /* 91 */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R27_OUTFMT); /* read 0x34 */
em28xx_write_reg(dev, EM28XX_R27_OUTFMT, 0x34);
em28xx_read_reg(dev, EM28XX_R0C_USBSUSP); /* read 0x10 */
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x10);
em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);
i2c_master_send(0x4a>>1, { 1f }, 0x01);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x4a>>1, &buf, 0x01); /* 91 */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x14);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);
i2c_master_send(0x4a>>1, { 0d 00 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10);
em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x02);
em28xx_read_reg(dev, EM28XX_R0E_AUDIOSRC); /* read 0xc8 */
em28xx_write_reg(dev, EM28XX_R0E_AUDIOSRC, 0xc8);
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x87);
i2c_master_send(0x4a>>1, { 0a 80 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0e 01 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x14);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);
i2c_master_send(0x4a>>1, { 0d 00 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10);
em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x02);
i2c_master_send(0x4a>>1, { 0a 80 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0e 01 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0a 80 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0e 01 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0xc6>>1, &buf, 0x01); /* 7c */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x86>>1, &buf, 0x01); /* e2 */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x00);
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x00);
em28xx_read_reg(dev, EM28XX_R12_VINENABLE); /* read 0x67 */
em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
em28xx_read_reg(dev, EM28XX_R0C_USBSUSP); /* read 0x10 */
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x00);
i2c_master_send(0x4a>>1, { 02 c2 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
em28xx_write_reg(dev, 0x13, 0x08);
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x10);
em28xx_write_reg(dev, EM28XX_R27_OUTFMT, 0x34);
em28xx_write_reg(dev, EM28XX_R10_VINMODE, 0x00);
em28xx_write_reg(dev, EM28XX_R11_VINCTRL, 0x11);
em28xx_write_reg(dev, EM28XX_R28_XMIN, 0x01);
em28xx_write_reg(dev, EM28XX_R29_XMAX, 0xaf);
em28xx_write_reg(dev, EM28XX_R2A_YMIN, 0x01);
em28xx_write_reg(dev, EM28XX_R2B_YMAX, 0x47);
em28xx_write_reg(dev, EM28XX_R1C_HSTART, 0x08);
em28xx_write_reg(dev, EM28XX_R1D_VSTART, 0x00);
em28xx_write_reg(dev, EM28XX_R1E_CWIDTH, 0xb0);
em28xx_write_reg(dev, EM28XX_R1F_CHEIGHT, 0x48);
em28xx_read_reg(dev, EM28XX_R26_COMPR); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x10);
em28xx_write_reg16(dev, EM28XX_R30_HSCALELOW,0x1000);
i2c_master_send(0x4a>>1, { 01 08 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 03 30 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 06 e9 0d 88 01 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* 12 */
em28xx_read_reg(dev, 0x05); /* read 0x10 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x60>>1, &buf, 0x01); /* ff */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
i2c_master_send(0xc6>>1, { 13 82 8e 02 b0 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x86>>1, { 00 16 70 49 }, 0x04);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
i2c_master_send(0xc6>>1, { 13 82 8e 02 b0 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x86>>1, { 00 16 70 49 }, 0x04);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
i2c_master_send(0xc6>>1, { 13 82 8e 02 b0 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x86>>1, { 00 16 70 49 }, 0x04);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
i2c_master_send(0xc6>>1, { 13 82 8e 02 b0 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x86>>1, { 00 16 70 49 }, 0x04);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x00);
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x00);
em28xx_read_reg(dev, EM28XX_R12_VINENABLE); /* read 0x27 */
em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
em28xx_read_reg(dev, EM28XX_R0C_USBSUSP); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x00);
i2c_master_send(0x4a>>1, { 02 c2 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
em28xx_write_reg(dev, 0x13, 0x08);
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x10);
em28xx_write_reg(dev, EM28XX_R27_OUTFMT, 0x34);
em28xx_write_reg(dev, EM28XX_R10_VINMODE, 0x00);
em28xx_write_reg(dev, EM28XX_R11_VINCTRL, 0x11);
em28xx_write_reg(dev, EM28XX_R28_XMIN, 0x01);
em28xx_write_reg(dev, EM28XX_R29_XMAX, 0xaf);
em28xx_write_reg(dev, EM28XX_R2A_YMIN, 0x01);
em28xx_write_reg(dev, EM28XX_R2B_YMAX, 0x47);
em28xx_write_reg(dev, EM28XX_R1C_HSTART, 0x08);
em28xx_write_reg(dev, EM28XX_R1D_VSTART, 0x00);
em28xx_write_reg(dev, EM28XX_R1E_CWIDTH, 0xb0);
em28xx_write_reg(dev, EM28XX_R1F_CHEIGHT, 0x48);
em28xx_read_reg(dev, EM28XX_R26_COMPR); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x10);
em28xx_write_reg16(dev, EM28XX_R30_HSCALELOW,0x1000);
i2c_master_send(0x4a>>1, { 01 08 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 03 30 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 06 e9 0d 88 01 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0a 80 47 40 00 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0f 2a }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 10 08 0c e7 00 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0a 80 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0e 01 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0xc6>>1, { 13 82 8e 02 b0 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x86>>1, { 00 16 70 49 }, 0x04);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 02 c2 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x14);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);
i2c_master_send(0x4a>>1, { 0d 00 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10);
em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x02);
em28xx_read_reg(dev, EM28XX_R26_COMPR); /* read 0x10 */
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x10);
i2c_master_send(0x4a>>1, { 1f }, 0x01);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x4a>>1, &buf, 0x01); /* 91 */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R27_OUTFMT); /* read 0x34 */
em28xx_write_reg(dev, EM28XX_R27_OUTFMT, 0x34);
em28xx_read_reg(dev, EM28XX_R0C_USBSUSP); /* read 0x10 */
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x10);
em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);
i2c_master_send(0x4a>>1, { 1f }, 0x01);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x4a>>1, &buf, 0x01); /* 91 */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x14);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);
i2c_master_send(0x4a>>1, { 0d 00 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10);
em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x02);
em28xx_read_reg(dev, EM28XX_R0E_AUDIOSRC); /* read 0xc8 */
em28xx_write_reg(dev, EM28XX_R0E_AUDIOSRC, 0xc8);
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x87);
i2c_master_send(0x4a>>1, { 0a 80 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0e 01 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x14);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);
i2c_master_send(0x4a>>1, { 0d 00 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10);
em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x02);
i2c_master_send(0x4a>>1, { 0a 80 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0e 01 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0a 80 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0e 01 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0xc6>>1, &buf, 0x01); /* 7c */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x86>>1, &buf, 0x01); /* e2 */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x00);
em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x00);
i2c_master_send(0x4a>>1, { 02 c2 00 }, 0x02);
em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R1C_HSTART, 0x08);
em28xx_write_reg(dev, EM28XX_R1D_VSTART, 0x00);
em28xx_write_reg(dev, EM28XX_R1E_CWIDTH, 0xb0);
em28xx_write_reg(dev, EM28XX_R1F_CHEIGHT, 0x48);
em28xx_read_reg(dev, EM28XX_R26_COMPR); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x10);
em28xx_write_reg16(dev, EM28XX_R30_HSCALELOW,0x1000);
i2c_master_send(0x4a>>1, { 01 08 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 03 30 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 06 e9 0d 88 01 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0a 80 47 40 00 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0f 2a }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 10 08 0c e7 00 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0a 80 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0e 01 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0xc6>>1, { 13 82 8e 02 b0 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x86>>1, { 00 16 70 49 }, 0x04);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 02 c2 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x14);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);
i2c_master_send(0x4a>>1, { 0d 00 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10);
em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x02);
em28xx_read_reg(dev, EM28XX_R26_COMPR); /* read 0x10 */
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x10);
i2c_master_send(0x4a>>1, { 1f }, 0x01);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x4a>>1, &buf, 0x01); /* 91 */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R27_OUTFMT); /* read 0x34 */
em28xx_write_reg(dev, EM28XX_R27_OUTFMT, 0x34);
em28xx_read_reg(dev, EM28XX_R0C_USBSUSP); /* read 0x10 */
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x10);
em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);
i2c_master_send(0x4a>>1, { 1f }, 0x01);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x4a>>1, &buf, 0x01); /* 91 */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R0E_AUDIOSRC); /* read 0xca */
em28xx_write_reg(dev, EM28XX_R0E_AUDIOSRC, 0xca);
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x87);
em28xx_read_reg(dev, EM28XX_R12_VINENABLE); /* read 0x67 */
em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
em28xx_read_reg(dev, EM28XX_R0C_USBSUSP); /* read 0x10 */
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x00);
em28xx_read_reg(dev, EM28XX_R0C_USBSUSP); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x00);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x00);
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x00);
em28xx_read_reg(dev, EM28XX_R12_VINENABLE); /* read 0x27 */
em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x87 */
em28xx_read_reg(dev, EM28XX_R0C_USBSUSP); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x07);
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x00);
i2c_master_send(0x4a>>1, { 02 c2 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x10);
em28xx_write_reg(dev, EM28XX_R27_OUTFMT, 0x34);
em28xx_write_reg(dev, EM28XX_R10_VINMODE, 0x00);
em28xx_write_reg(dev, EM28XX_R28_XMIN, 0x01);
em28xx_write_reg(dev, EM28XX_R29_XMAX, 0xaf);
em28xx_write_reg(dev, EM28XX_R2A_YMIN, 0x01);
em28xx_write_reg(dev, EM28XX_R1D_VSTART, 0x00);
em28xx_write_reg(dev, EM28XX_R1E_CWIDTH, 0xb0);
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x10);
em28xx_write_reg16(dev, EM28XX_R30_HSCALELOW,0x1000);
i2c_master_send(0x4a>>1, { 01 08 00 }, 0x02);
i2c_master_send(0x4a>>1, { 06 e9 0d 88 01 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0a 80 47 40 00 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 10 08 0c e7 00 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0e 01 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 02 c2 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0d 00 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x02);
em28xx_read_reg(dev, EM28XX_R26_COMPR); /* read 0x10 */
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x10);
i2c_master_recv(0x4a>>1, &buf, 0x01); /* 91 */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R27_OUTFMT); /* read 0x10 */
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x10);
em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);
i2c_master_send(0x4a>>1, { 1f 00 }, 0x01);
em28xx_read_reg(dev, EM28XX_R12_VINENABLE); /* read 0x67 */
em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
em28xx_read_reg(dev, EM28XX_R0C_USBSUSP); /* read 0x10 */
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x00);
em28xx_read_reg(dev, EM28XX_R0C_USBSUSP); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x00);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x00);
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x00);
em28xx_read_reg(dev, EM28XX_R12_VINENABLE); /* read 0x27 */
em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
em28xx_read_reg(dev, EM28XX_R0C_USBSUSP); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x00);
i2c_master_send(0x4a>>1, { 02 c2 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
em28xx_write_reg(dev, 0x13, 0x08);
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x10);
em28xx_write_reg(dev, EM28XX_R27_OUTFMT, 0x34);
em28xx_write_reg(dev, EM28XX_R10_VINMODE, 0x00);
em28xx_write_reg(dev, EM28XX_R11_VINCTRL, 0x11);
em28xx_write_reg(dev, EM28XX_R28_XMIN, 0x01);
em28xx_write_reg(dev, EM28XX_R29_XMAX, 0xaf);
em28xx_write_reg(dev, EM28XX_R2A_YMIN, 0x01);
em28xx_write_reg(dev, EM28XX_R2B_YMAX, 0x47);
em28xx_write_reg(dev, EM28XX_R1C_HSTART, 0x08);
em28xx_write_reg(dev, EM28XX_R1D_VSTART, 0x00);
em28xx_write_reg(dev, EM28XX_R1E_CWIDTH, 0xb0);
em28xx_write_reg(dev, EM28XX_R1F_CHEIGHT, 0x48);
em28xx_read_reg(dev, EM28XX_R26_COMPR); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x10);
em28xx_write_reg16(dev, EM28XX_R30_HSCALELOW,0x1000);
i2c_master_send(0x4a>>1, { 01 08 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 03 30 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 06 e9 0d 88 01 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0a 80 47 40 00 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0f 2a }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 10 08 0c e7 00 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0a 80 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 0e 01 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0xc6>>1, { 13 82 8e 02 b0 }, 0x05);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x86>>1, { 00 16 70 49 }, 0x04);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_send(0x4a>>1, { 02 c2 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x14);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);
i2c_master_send(0x4a>>1, { 0d 00 }, 0x02);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10);
em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x02);
em28xx_read_reg(dev, EM28XX_R26_COMPR); /* read 0x10 */
em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x10);
i2c_master_send(0x4a>>1, { 1f }, 0x01);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x4a>>1, &buf, 0x01); /* 91 */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R27_OUTFMT); /* read 0x34 */
em28xx_write_reg(dev, EM28XX_R27_OUTFMT, 0x34);
em28xx_read_reg(dev, EM28XX_R0C_USBSUSP); /* read 0x10 */
em28xx_write_reg(dev, EM28XX_R0C_USBSUSP, 0x10);
em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10);
em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);
i2c_master_send(0x4a>>1, { 1f }, 0x01);
em28xx_read_reg(dev, 0x05); /* read 0x00 */
i2c_master_recv(0x4a>>1, &buf, 0x01); /* 91 */
em28xx_read_reg(dev, 0x05); /* read 0x00 */
em28xx_read_reg(dev, EM28XX_R0E_AUDIOSRC); /* read 0xca */
em28xx_write_reg(dev, EM28XX_R0E_AUDIOSRC, 0xca);
em28xx_read_reg(dev, EM28XX_R0F_XCLK); /* read 0x07 */
em28xx_write_reg(dev, EM28XX_R0F_XCLK, 0x87);
