Re: v4l: Buffer pools

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Hi Guennadi,

On Thursday 07 April 2011 13:51:12 Guennadi Liakhovetski wrote:
> On Fri, 1 Apr 2011, Laurent Pinchart wrote:
> 
> [snip]
> 
> > - Cache management (ISP and DSS)
> > 
> > Cache needs to be synchronized between userspace applications, kernel
> > space and hardware. Synchronizing the cache is an expensive operation
> > and should be avoided when possible. Userspace applications don't need
> > to select memory mapping cache attributes, but should be able to either
> > handle cache synchronization explicitly, or override the drivers'
> > default behaviour.
> 
> So, what cache attributes are currently used by the driver? Presumably, it
> is some cacheable variant?

When using MMAP, memory is allocated by the driver from system memory and is 
mapped as normal cacheable memory. When using USERPTR, mapping cache 
attributes are not touched by the driver.

> And which way should the application be able to override the driver's
> behaviour? One of these overrides would probably be "skip cache invalidate
> (input) / flush (output)," right? Anything else?

Those are the operations I was thinking about.

-- 
Regards,

Laurent Pinchart
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