Add #define's for the output enable registers (0x3004, 0x3005, 0x3006),
also known as SC_CTRL_04, SC_CTRL_05, SC_CTRL_04. Use those register
definitions instead of the raw values in the `common_regs` struct.
All values are based on the OV9281 datasheet v1.53 (january 2019).
Signed-off-by: Richard Leitner <richard.leitner@xxxxxxxxx>
---
drivers/media/i2c/ov9282.c | 29 ++++++++++++++++++++++++++---
1 file changed, 26 insertions(+), 3 deletions(-)
diff --git a/drivers/media/i2c/ov9282.c b/drivers/media/i2c/ov9282.c
index c882a021cf18852237bf9b9524d3de0c5b48cbcb..f42e0d439753e74d14e3a3592029e48f49234927 100644
--- a/drivers/media/i2c/ov9282.c
+++ b/drivers/media/i2c/ov9282.c
@@ -37,6 +37,29 @@
#define OV9282_REG_ID 0x300a
#define OV9282_ID 0x9281
+/* Output enable registers */
+#define OV9282_REG_OUTPUT_ENABLE4 0x3004
+#define OV9282_OUTPUT_ENABLE4_GPIO2 BIT(1)
+#define OV9282_OUTPUT_ENABLE4_D9 BIT(0)
+
+#define OV9282_REG_OUTPUT_ENABLE5 0x3005
+#define OV9282_OUTPUT_ENABLE5_D8 BIT(7)
+#define OV9282_OUTPUT_ENABLE5_D7 BIT(6)
+#define OV9282_OUTPUT_ENABLE5_D6 BIT(5)
+#define OV9282_OUTPUT_ENABLE5_D5 BIT(4)
+#define OV9282_OUTPUT_ENABLE5_D4 BIT(3)
+#define OV9282_OUTPUT_ENABLE5_D3 BIT(2)
+#define OV9282_OUTPUT_ENABLE5_D2 BIT(1)
+#define OV9282_OUTPUT_ENABLE5_D1 BIT(0)
+
+#define OV9282_REG_OUTPUT_ENABLE6 0x3006
+#define OV9282_OUTPUT_ENABLE6_D0 BIT(7)
+#define OV9282_OUTPUT_ENABLE6_PCLK BIT(6)
+#define OV9282_OUTPUT_ENABLE6_HREF BIT(5)
+#define OV9282_OUTPUT_ENABLE6_STROBE BIT(3)
+#define OV9282_OUTPUT_ENABLE6_ILPWM BIT(2)
+#define OV9282_OUTPUT_ENABLE6_VSYNC BIT(1)
+
/* Exposure control */
#define OV9282_REG_EXPOSURE 0x3500
#define OV9282_EXPOSURE_MIN 1
@@ -213,9 +236,9 @@ static const struct ov9282_reg common_regs[] = {
{0x0302, 0x32},
{0x030e, 0x02},
{0x3001, 0x00},
- {0x3004, 0x00},
- {0x3005, 0x00},
- {0x3006, 0x04},
+ {OV9282_REG_OUTPUT_ENABLE4, 0x00},
+ {OV9282_REG_OUTPUT_ENABLE5, 0x00},
+ {OV9282_REG_OUTPUT_ENABLE6, OV9282_OUTPUT_ENABLE6_ILPWM},
{0x3011, 0x0a},
{0x3013, 0x18},
{0x301c, 0xf0},
--
2.47.2
