Hi Nicolas
> -----Original Message-----
> From: Nicolas Dufresne <nicolas.dufresne@xxxxxxxxxxxxx>
> Sent: Tuesday, December 17, 2024 11:04 PM
> To: jackson.lee <jackson.lee@xxxxxxxxxxxxxxx>; mchehab@xxxxxxxxxx;
> hverkuil-cisco@xxxxxxxxx; sebastian.fricke@xxxxxxxxxxxxx;
> bob.beckett@xxxxxxxxxxxxx; dafna.hirschfeld@xxxxxxxxxxxxx
> Cc: linux-media@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; lafley.kim
> <lafley.kim@xxxxxxxxxxxxxxx>; b-brnich@xxxxxx; hverkuil@xxxxxxxxx; Nas
> Chung <nas.chung@xxxxxxxxxxxxxxx>
> Subject: Re: [PATCH v2 2/4] media: chips-media: wave5: Avoid race
> condition for interrupt handling
>
> Le mardi 17 décembre 2024 à 13:51 +0900, Jackson.lee a écrit :
> > In case of multi instance, interrupts can occur for other instances as
> > soon as interrupt is cleared. If driver reads the instance_info after
> > clearing the interrupt, it is not guaranteed that the instance_info is
> > valid for the current interrupt.
> >
> > Read the instance_info register for each interrupt before clearing the
> > interrupt.
> >
> > Signed-off-by: Jackson.lee <jackson.lee@xxxxxxxxxxxxxxx>
> > Signed-off-by: Nas Chung <nas.chung@xxxxxxxxxxxxxxx>
> > Reviewed-by: Nicolas Dufresne <nicolas.dufresne@xxxxxxxxxxxxx>
>
> Same, what is the Fixes tag ?
Fixes: ed7276ed2fd0 ("media: chips-media: wave5: Add hrtimer based polling support")
thanks
>
> > ---
> > drivers/media/platform/chips-media/wave5/wave5-vpu.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpu.c
> > b/drivers/media/platform/chips-media/wave5/wave5-vpu.c
> > index 6b294a2d6717..63a607d10433 100644
> > --- a/drivers/media/platform/chips-media/wave5/wave5-vpu.c
> > +++ b/drivers/media/platform/chips-media/wave5/wave5-vpu.c
> > @@ -55,12 +55,12 @@ static void wave5_vpu_handle_irq(void *dev_id)
> > struct vpu_device *dev = dev_id;
> >
> > irq_reason = wave5_vdi_read_register(dev, W5_VPU_VINT_REASON);
> > + seq_done = wave5_vdi_read_register(dev,
> W5_RET_SEQ_DONE_INSTANCE_INFO);
> > + cmd_done = wave5_vdi_read_register(dev, W5_RET_QUEUE_CMD_DONE_INST);
> > wave5_vdi_write_register(dev, W5_VPU_VINT_REASON_CLR, irq_reason);
> > wave5_vdi_write_register(dev, W5_VPU_VINT_CLEAR, 0x1);
> >
> > list_for_each_entry(inst, &dev->instances, list) {
> > - seq_done = wave5_vdi_read_register(dev,
> W5_RET_SEQ_DONE_INSTANCE_INFO);
> > - cmd_done = wave5_vdi_read_register(dev,
> W5_RET_QUEUE_CMD_DONE_INST);
> >
> > if (irq_reason & BIT(INT_WAVE5_INIT_SEQ) ||
> > irq_reason & BIT(INT_WAVE5_ENC_SET_PARAM)) {
