Re: [PATCH 4/4] media: platform: rzg2l-cru: Add support for RAW10/12/14 data

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On Tue, Sep 24, 2024 at 04:21:03PM +0200, Jacopo Mondi wrote:
> Hi Dan
> 
> On Fri, Sep 20, 2024 at 01:41:15PM GMT, Daniel Scally wrote:
> > From: Daniel Scally <dan.scally+renesas@xxxxxxxxxxxxxxxx>
> >
> > Add support to the rzg2l-cru driver to capture 10/12/14 bit bayer
> > data and output it into the CRU's 64-bit packed pixel format.
> >
> > Signed-off-by: Daniel Scally <dan.scally+renesas@xxxxxxxxxxxxxxxx>
> 
> Maybe I'm missing something for some previous series, but I see
> rzg2l_cru_csi2_setup() programming ICnMC with the UserDefined data
> type ?

The function should use rzg2l_cru_ip_format.datatype << 16 (with an
appropriate register macro). I think I've commented on that in a
previous CRU patch series from Prabhakar, but I don't recall if the
comment has been addressed yet.

> > ---
> >  .../platform/renesas/rzg2l-cru/rzg2l-csi2.c   | 12 ++++
> >  .../platform/renesas/rzg2l-cru/rzg2l-ip.c     | 72 +++++++++++++++++++
> >  2 files changed, 84 insertions(+)
> >
> > diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c
> > index 9609ca2a2f67..6b83f317919f 100644
> > --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c
> > +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c
> > @@ -192,6 +192,18 @@ static const struct rzg2l_csi2_format rzg2l_csi2_formats[] = {
> >  	{ .code = MEDIA_BUS_FMT_SGBRG8_1X8, .bpp = 8, },
> >  	{ .code = MEDIA_BUS_FMT_SGRBG8_1X8, .bpp = 8, },
> >  	{ .code = MEDIA_BUS_FMT_SRGGB8_1X8, .bpp = 8, },
> > +	{ .code = MEDIA_BUS_FMT_SBGGR10_1X10, .bpp = 10, },
> > +	{ .code = MEDIA_BUS_FMT_SGBRG10_1X10, .bpp = 10, },
> > +	{ .code = MEDIA_BUS_FMT_SGRBG10_1X10, .bpp = 10, },
> > +	{ .code = MEDIA_BUS_FMT_SRGGB10_1X10, .bpp = 10, },
> > +	{ .code = MEDIA_BUS_FMT_SBGGR12_1X12, .bpp = 12, },
> > +	{ .code = MEDIA_BUS_FMT_SGBRG12_1X12, .bpp = 12, },
> > +	{ .code = MEDIA_BUS_FMT_SGRBG12_1X12, .bpp = 12, },
> > +	{ .code = MEDIA_BUS_FMT_SRGGB12_1X12, .bpp = 12, },
> > +	{ .code = MEDIA_BUS_FMT_SBGGR14_1X14, .bpp = 14, },
> > +	{ .code = MEDIA_BUS_FMT_SGBRG14_1X14, .bpp = 14, },
> > +	{ .code = MEDIA_BUS_FMT_SGRBG14_1X14, .bpp = 14, },
> > +	{ .code = MEDIA_BUS_FMT_SRGGB14_1X14, .bpp = 14, },
> >  };
> >
> >  static inline struct rzg2l_csi2 *sd_to_csi2(struct v4l2_subdev *sd)
> > diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c
> > index f2fea3a63444..65b1cf9e553f 100644
> > --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c
> > +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c
> > @@ -42,6 +42,78 @@ static const struct rzg2l_cru_ip_format rzg2l_cru_ip_formats[] = {
> >  		.datatype = MIPI_CSI2_DT_RAW8,
> >  		.icndmr = 0,
> >  	},
> > +	{
> > +		.code = MEDIA_BUS_FMT_SBGGR10_1X10,
> > +		.format = V4L2_PIX_FMT_CRU_SBGGR10,
> > +		.datatype = MIPI_CSI2_DT_RAW10,
> > +		.icndmr = 0,
> > +	},
> > +	{
> > +		.code = MEDIA_BUS_FMT_SGBRG10_1X10,
> > +		.format = V4L2_PIX_FMT_CRU_SGBRG10,
> > +		.datatype = MIPI_CSI2_DT_RAW10,
> > +		.icndmr = 0,
> > +	},
> > +	{
> > +		.code = MEDIA_BUS_FMT_SGRBG10_1X10,
> > +		.format = V4L2_PIX_FMT_CRU_SGRBG10,
> > +		.datatype = MIPI_CSI2_DT_RAW10,
> > +		.icndmr = 0,
> > +	},
> > +	{
> > +		.code = MEDIA_BUS_FMT_SRGGB10_1X10,
> > +		.format = V4L2_PIX_FMT_CRU_SRGGB10,
> > +		.datatype = MIPI_CSI2_DT_RAW10,
> > +		.icndmr = 0,
> > +	},
> > +	{
> > +		.code = MEDIA_BUS_FMT_SBGGR12_1X12,
> > +		.format = V4L2_PIX_FMT_CRU_SBGGR12,
> > +		.datatype = MIPI_CSI2_DT_RAW12,
> > +		.icndmr = 0,
> > +	},
> > +	{
> > +		.code = MEDIA_BUS_FMT_SGBRG12_1X12,
> > +		.format = V4L2_PIX_FMT_CRU_SGBRG12,
> > +		.datatype = MIPI_CSI2_DT_RAW12,
> > +		.icndmr = 0,
> > +	},
> > +	{
> > +		.code = MEDIA_BUS_FMT_SGRBG12_1X12,
> > +		.format = V4L2_PIX_FMT_CRU_SGRBG12,
> > +		.datatype = MIPI_CSI2_DT_RAW12,
> > +		.icndmr = 0,
> > +	},
> > +	{
> > +		.code = MEDIA_BUS_FMT_SRGGB12_1X12,
> > +		.format = V4L2_PIX_FMT_CRU_SRGGB12,
> > +		.datatype = MIPI_CSI2_DT_RAW12,
> > +		.icndmr = 0,
> > +	},
> > +	{
> > +		.code = MEDIA_BUS_FMT_SBGGR14_1X14,
> > +		.format = V4L2_PIX_FMT_CRU_SBGGR14,
> > +		.datatype = MIPI_CSI2_DT_RAW14,
> > +		.icndmr = 0,
> > +	},
> > +	{
> > +		.code = MEDIA_BUS_FMT_SGBRG14_1X14,
> > +		.format = V4L2_PIX_FMT_CRU_SGBRG14,
> > +		.datatype = MIPI_CSI2_DT_RAW14,
> > +		.icndmr = 0,
> > +	},
> > +	{
> > +		.code = MEDIA_BUS_FMT_SGRBG14_1X14,
> > +		.format = V4L2_PIX_FMT_CRU_SGRBG14,
> > +		.datatype = MIPI_CSI2_DT_RAW14,
> > +		.icndmr = 0,
> > +	},
> > +	{
> > +		.code = MEDIA_BUS_FMT_SRGGB14_1X14,
> > +		.format = V4L2_PIX_FMT_CRU_SRGGB14,
> > +		.datatype = MIPI_CSI2_DT_RAW14,
> > +		.icndmr = 0,
> > +	},
> >  };
> >
> >  const struct rzg2l_cru_ip_format *rzg2l_cru_ip_code_to_fmt(unsigned int code)

-- 
Regards,

Laurent Pinchart




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