On Thu, Sep 12, 2024 at 04:11:58PM GMT, Bryan O'Donoghue wrote: > On 12/09/2024 13:44, Vladimir Zapolskiy wrote: > > > csiphy0 > > > > > > vdda-phy-supply = <&vreg_l2c_0p9>; > > > vdda-pll-supply = <&vreg_l1c_1p2>; > > > > > > This is also the case for csiphy 1/2/4 > > > > > > So, I _don't_ believe this is work we need to do, since its the same > > > regulator for each PHY. > > > > This is board specific, and even if the separation is not needed on the > > boards > > you have just checked, still it may be needed on some boards, which are > > not yet > > checked/not yet known. > > There is a Power Grid Analysis document which specifies these rails @ the > SoC level and assumes you've used the Qcom PMIC to power, moreover the PGA > re-uses the same regulator over and over again. > > You _could_ provide that power from your own PMIC which provides the same > voltage range as the Qcom PMIC you haven't used. Even if you did provide > that from your own PMIC you'd have to provide _separate_ rails for the > various CSIPHYs before it would be required to have a per PHY rail > requirement on this SoC. > > Are people really powering these SoCs with their own PMICs ? > No probably not. Yes, they are. -- With best wishes Dmitry
