Hi Bjorn,
On Mon, Mar 25, 2024 at 05:03:25PM -0500, Bjorn Helgaas wrote:
> From: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
>
> ipu-cio2 uses generic power management, and pci_pm_runtime_suspend() and
> pci_pm_runtime_resume() already take care of setting the PCI device power
> state, so the driver doesn't need to do it explicitly.
>
> Remove explicit setting to D3hot or D0 during runtime suspend and resume.
>
> Remove #defines that are no longer used.
>
> Signed-off-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
> Cc: Hyungwoo Yang <hyungwoo.yang@xxxxxxxxx>
> Cc: Rajmohan Mani <rajmohan.mani@xxxxxxxxx>
> Cc: Vijaykumar Ramya <ramya.vijaykumar@xxxxxxxxx>
> Cc: Samu Onkalo <samu.onkalo@xxxxxxxxx>
> Cc: Jouni Högander <jouni.hogander@xxxxxxxxx>
> Cc: Jouni Ukkonen <jouni.ukkonen@xxxxxxxxx>
> Cc: Antti Laakso <antti.laakso@xxxxxxxxx>
> ---
> This code was initially added by c2a6a07afe4a ("media: intel-ipu3: cio2:
> add new MIPI-CSI2 driver").
>
> Even at that time, the explicit power state setting should not have been
> necessary, so maybe there's a reason for it. I have no way to test this,
> so if it *is* needed, please:
>
> - Add a comment about the reason and
>
> - Convert it to use pci_set_power_state() so the PCI core knows about the
> change and all the required state transition delays are observed.
Thanks for the patch.
The device seems to work fine with the patch applied so I presume it wasn't
necessary to begin with.
--
Regards,
Sakari Ailus
