On Thu, Sep 08, 2022 at 01:40:39PM +0200, Krzysztof Kozlowski wrote:
> On 06/09/2022 01:04, Lad Prabhakar wrote:
> > Document the CRU block found on Renesas RZ/G2L (and alike) SoCs.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx>
>
> Thank you for your patch. There is something to discuss/improve.
>
> > +properties:
> > + compatible:
> > + items:
> > + - enum:
> > + - renesas,r9a07g044-cru # RZ/G2{L,LC}
> > + - renesas,r9a07g054-cru # RZ/V2L
> > + - const: renesas,rzg2l-cru
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + maxItems: 3
> > +
> > + interrupt-names:
> > + items:
> > + - const: image_conv
> > + - const: image_conv_err
> > + - const: axi_mst_err
> > +
> > + clocks:
> > + items:
> > + - description: CRU Main clock
> > + - description: CPU Register access clock
> > + - description: CRU image transfer clock
> > +
> > + clock-names:
> > + items:
> > + - const: vclk
> > + - const: pclk
> > + - const: aclk
>
> Drop the "clk" suffixes. Remaining names could be made a bit more readable.
These names come from the documentation, isn't it better to match the
datasheet ?
> > +
--
Regards,
Laurent Pinchart
