As reported in patch 2/2 commit message the the VNCSI_IFMD register
has the following limitations according to chip manual revision 2.20
- V3M, V3H and E3 do not support the DES1 field has they do not feature
a CSI20 receiver.
- D3 only supports parallel input, and the whole register shall always
be written as 0.
This patch upports the BSP change commit f54697394457
("media: rcar-vin: Fix VnCSI_IFMD register access for r8a77990") from
Koji Matsuoka
Tested on r-car E3 Ebisu.
v2 -> v3:
- Remove a few comments and add Niklas' tag to [2/2]
v1 -> v2:
- Inspect the channel routing table to deduce the availability of DES1/DES0
bits as suggested by Niklas.
Jacopo Mondi (2):
media: rcar-vin: Remove unused macro
media: rcar-vin: Mask VNCSI_IFMD register
drivers/media/platform/rcar-vin/rcar-dma.c | 26 ++++++++++++++++++----
1 file changed, 22 insertions(+), 4 deletions(-)
--
2.29.1
