Use the correct video timing divisor to calculate the SYS divisor. Instead of the current value, the minimum was used. This could have resulted in a too low SYS divisor. Signed-off-by: Sakari Ailus <sakari.ailus@xxxxxxxxxxxxxxx> --- drivers/media/i2c/ccs-pll.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/ccs-pll.c b/drivers/media/i2c/ccs-pll.c index b2f0fa14ff92..ea0f84fc8a90 100644 --- a/drivers/media/i2c/ccs-pll.c +++ b/drivers/media/i2c/ccs-pll.c @@ -365,14 +365,14 @@ __ccs_pll_calculate(struct device *dev, const struct ccs_pll_limits *lim, /* Check if this one is better. */ if (pix_div * sys_div - <= roundup(min_vt_div, best_pix_div)) + <= roundup(vt_div, best_pix_div)) best_pix_div = pix_div; } if (best_pix_div < INT_MAX >> 1) break; } - pll->vt_bk.sys_clk_div = DIV_ROUND_UP(min_vt_div, best_pix_div); + pll->vt_bk.sys_clk_div = DIV_ROUND_UP(vt_div, best_pix_div); pll->vt_bk.pix_clk_div = best_pix_div; pll->vt_bk.sys_clk_freq_hz = -- 2.27.0
