2018年12月31日(月) 19:30 Marco Felsch <m.felsch@xxxxxxxxxxxxxx>:
>
> Hi Akinobu,
>
> On 18-12-30 02:07, Akinobu Mita wrote:
> > Since commit 98480d65c48c ("media: mt9m111: allow to setup pixclk
> > polarity"), the MT9M111_OUTFMT_INV_PIX_CLOCK bit in the output format
> > control 2 register has to be changed depending on the pclk-sample property
> > setting.
> >
> > Without this change, the MT9M111_OUTFMT_INV_PIX_CLOCK bit is unchanged.
>
> I don't know what you mean, it will get applied depending on the
> property.
>
> 8<------------------------------------------------------------------------
> static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
> u32 code)
> {
>
> ...
>
> /* receiver samples on falling edge, chip-hw default is rising */
> if (mt9m111->pclk_sample == 0)
> mask_outfmt2 |= MT9M111_OUTFMT_INV_PIX_CLOCK;
>
> ...
> }
>
> 8<------------------------------------------------------------------------
>
> Isn't this right?
You are right. I misread and thought the commit sets the
MT9M111_OUTFMT_INV_PIX_CLOCK bit in 'data_outfmt2' instead of
'mask_outfmt2'.
This patch will be dropped from this series in the next version.
> Can you cc me the other patches too, so I can keep track of it easier?
OK. I'll do from v2.
