Re: [PATCH 5/6] net: fec: use dma_alloc_noncoherent for m532x

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On Mon, Oct 16, 2023 at 11:12 AM Geert Uytterhoeven
<geert@xxxxxxxxxxxxxx> wrote:
On Tue, Oct 10, 2023 at 4:45 PM Greg Ungerer <gerg@xxxxxxxxxxxxxx> wrote:
On 9/10/23 22:58, Christoph Hellwig wrote:
On Mon, Oct 09, 2023 at 11:29:12AM +0100, Robin Murphy wrote:
It looks a bit odd that this ends up applying to all of Coldfire, while the
associated cache flush only applies to the M532x platform, which implies
that we'd now be relying on the non-coherent allocation actually being
coherent on other Coldfire platforms.

Would it work to do something like this to make sure dma-direct does the
right thing on such platforms (which presumably don't have caches?), and
then reduce the scope of this FEC hack accordingly, to clean things up even
better?

Probably.  Actually Greg comment something along the lines last
time, and mentioned something about just instruction vs instruction
and data cache.

I just elaborated on that point a little in response to Robin's email.


diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu
index b826e9c677b2..1851fa3fe077 100644
--- a/arch/m68k/Kconfig.cpu
+++ b/arch/m68k/Kconfig.cpu
@@ -27,6 +27,7 @@ config COLDFIRE
     select CPU_HAS_NO_BITFIELDS
     select CPU_HAS_NO_CAS
     select CPU_HAS_NO_MULDIV64
+    select DMA_DEFAULT_COHERENT if !MMU && !M523x

Although it would probably make more sense to simply not select
CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE and
CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU for these platforms and not
build the non-coherent code at all.  This should also include
all coldfire platforms with mmu (M54xx/M548x/M5441x).  Then
again for many of the coldfire platforms the Kconfig allows
to select CACHE_WRITETHRU/CACHE_COPYBACK which looks related.

Greg, any chance you could help out with the caching modes on
coldfire and legacy m68knommu?

Sure, yep. I am not aware that the legacy 68000 or 68328 had any caches
at all.

68000 (and derivatives like 68*328) does not have any cache.
68360 (which is no longer supported by Linux) is based on CPU32, and
does not seem to have any caches, although the documentation does
mention the use of "external cache memories".

As M68K selects NO_DMA if !MMU && !COLDFIRE anyway, this doesn't
matter for legacy^Wclassic m68knommu.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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