Hi Finn! Op wo 30 okt. 2019 om 01:31 schreef Finn Thain <fthain@xxxxxxxxxxxxxxxxxxx>:
On Tue, 29 Oct 2019, Kars de Jong wrote:diff --git a/drivers/scsi/esp_scsi.c b/drivers/scsi/esp_scsi.c index bb88995a12c7..6b34a5764de5 100644 --- a/drivers/scsi/esp_scsi.c +++ b/drivers/scsi/esp_scsi.c @@ -263,7 +263,11 @@ static void esp_reset_esp(struct esp *esp) esp->rev = FAS236; else if (family_code == 0x0a) esp->rev = FASHME; /* Version is usually '5'. */ - else + else if (family_code == 0x14) { + esp->rev = FSC; + /* Enable Active Negation */ + esp_write8(ESP_CONFIG4_RADE, ESP_CFG4);There is a comment in esp_scsi.h which seems to contradict the above logic, "ESP config register 4 read-write, found only on am53c974 chips." I think the comment should be corrected now.
Nice catch! I'll change the comment.
diff --git a/drivers/scsi/esp_scsi.h b/drivers/scsi/esp_scsi.h index 91b32f2a1a1b..b60ea3e5e0eb 100644 --- a/drivers/scsi/esp_scsi.h +++ b/drivers/scsi/esp_scsi.h @@ -211,6 +211,7 @@ /* ESP unique ID register read-only, found on fas236+fas100a only */ #define ESP_UID_F100A 0x00 /* ESP FAS100A */ #define ESP_UID_F236 0x02 /* ESP FAS236 */ +#define ESP_UID_FSC 0x14 /* NCR/Symbios Logic FSC */ #define ESP_UID_REV 0x07 /* ESP revision */ #define ESP_UID_FAM 0xf8 /* ESP family */
I think these should be in numerical order.
They're bit masks, but I'll add some white space to separate them and rearrange it so the values come after the family bit mask.
@@ -262,10 +263,11 @@ enum esp_rev { ESP100A = 0x01, /* NCR53C90A */ ESP236 = 0x02, FAS236 = 0x03, - FAS100A = 0x04, - FAST = 0x05, - FASHME = 0x06, - PCSCSI = 0x07, /* AM53c974 */ + FSC = 0x04, /* NCR/Symbios Logic FSC */ + FAS100A = 0x05, + FAST = 0x06, + FASHME = 0x07, + PCSCSI = 0x08, /* AM53c974 */I'm guessing that you've placed it here because of the esp->rev >= FAS236 tests that appear in a couple of places relating to sync transfer period. Might be worth mentioning that in the commit log.
That, and also the checks in the driver that check for esp->rev >= FAS100A. I think I'll add a comment to the enum so that others don't have the same issue that I first had. Actually, I think the PCSCSI value is also at the wrong position in the list, its CONFIG3 (called CNTLREG3 in the data manual http://bitsavers.trailing-edge.com/components/amd/_dataSheets/1993_53c974_PCscsi.pdf) has pretty much the same layout as the FAS236 and FSC, so it would probably have the same issue as me at high synchronous speeds... Kind regards, Kars.
