Hi Greg, m68 is normally not dma cache coherent, and thus requires invalidating or writing back caches in DMA, which is handled in the m68k_dma_sync_single_for_device routine. For coherent mappings the code sets up a non-cachable mapping in m68k_dma_alloc. Except that for the nommu or coldfire code it doesn't and just does a plain old page allocation without any caching magic. Does this mean coldfire and the nommu case in general do not actually require cache coherency and don't need the cache maintainance on the dma mapping operations either? -- To unsubscribe from this list: send the line "unsubscribe linux-m68k" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
