Hi Angelo,
On 31/10/16 20:35, Angelo Dureghello wrote:
Hi Geert,
On 31/10/2016 09:01, Geert Uytterhoeven wrote:
Hi Angelo,
On Mon, Oct 31, 2016 at 8:26 AM, Angelo Dureghello <angelo@xxxxxxxx> wrote:
i have still a last issue open on mcf5307-based "amcore"
board i would like to fix, and need a suggestion:
at design time, i wired the 32bit parallel data bus from cpu to
the ethernet chip as "straight" (D0 to D0, ... D32 to D32).
dm9000 driver btw works for little-endian cpu only. To have it
working, i actually keep a byte "swap" patch in the driver.
Since i guess i cannot pretend any driver patch for this case,
i am planning a new pcb version with 32bit data bus bytes swapped
in hardware.
What do you think ?
BenH has written some excellent background information about this:
Big and Little Endian inside / out
https://www.linuxplumbersconf.org/2012/wp-content/uploads/2012/09/2012-lpc-ref-big-little-endian-herrenschmidt.odp
https://www.youtube.com/watch?v=oBSuXP-1Tc0
Happy reading!
many thanks for the very interesting presentation,
so from what i understand, the issue is in this terms:
* dm9000 registers/memory byte order is little endian.
* coldfire memory byte order is big endian
The proper way to fix this should be as said in the presentation
above to swap bytes in hardware.
Does the dm9000 have to use a 16bit bus, or can you wire it
up 8bit only? Can be another option to avoid problems.
Regards
Greg
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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