On Mon, May 26, 2014 at 10:56 AM, Michael Schmitz <schmitzmic@xxxxxxxxx> wrote:
+ /* Wait for 5 PCLK cycles, which is about 63 CPU cycles */
+ /* 5 / 7.9872 MHz = approx. 0.63 us = 63 / 100 MHz */
The original Falcon and TT had a 16 MHz CPU clock IIRC.
This loop is meant to introduce a minimum delay, right? So assuming
a 100 MHz CPU will only prolong the delay on slower CPUs, which is safe.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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