+ __v = (w) & 0x0f; \
^^
ff?
+ __w = ((*(__force volatile u16 *) ((addr) + 0x10000 + (__v<<1)))); })
Woops, multiple use of `addr' and `w' in a macro can have nasty side-effects
(think e.g. `outw(addr++, value)'.
Wouldn't it be better to implement rom_out_be16() to use rom_out_8(),
for easier understanding of the code?
While I haven't done anything about the easier understanding part, I've
updated the patch so that I get no more undeclared isa_rom_inl and
friends. This is against Geert's quilt patched 2.6.21 and should help
getting the linux-m68k tree in sync.
Testing this kernel is moot, for as long as the Falcon IDE locking
imbalance problem isn't solved.
Michael
Subject: [PATCH] m68k: Atari ROM port ISA adapter update
Atari ROM port ISA adapter support - missing bits for generic IO support
Signed-off-by: Michael Schmitz <schmitz@xxxxxxxxxx>
---
io.h | 21 ++++++++++++++++
raw_io.h | 82 +++++++++++++++++++++++++++++++++++++++++++++++++--------------
2 files changed, 85 insertions(+), 18 deletions(-)
--- linux-m68k-2.6.21.orig/include/asm-m68k/io.h 2007-06-04 18:13:50.000000000 +0200
+++ linux-m68k-2.6.21/include/asm-m68k/io.h 2007-06-05 17:11:50.000000000 +0200
@@ -245,9 +245,11 @@
#if defined(CONFIG_ATARI_ROM_ISA)
#define isa_rom_inb(port) rom_in_8(isa_itb(port))
#define isa_rom_inw(port) (ISA_SEX ? rom_in_be16(isa_itw(port)) : rom_in_le16(isa_itw(port)))
+#define isa_rom_inl(port) (ISA_SEX ? rom_in_be32(isa_itw(port)) : rom_in_le32(isa_itw(port)))
#define isa_rom_outb(val,port) rom_out_8(isa_itb(port),(val))
#define isa_rom_outw(val,port) (ISA_SEX ? rom_out_be16(isa_itw(port),(val)) : rom_out_le16(isa_itw(port),(val)))
+#define isa_rom_outl(val,port) (ISA_SEX ? rom_out_be32(isa_itw(port),(val)) : rom_out_le32(isa_itw(port),(val)))
#define isa_rom_writeb(val,p) rom_out_8(isa_mtb((unsigned long)(p)),(val))
#define isa_rom_writew(val,p) \
@@ -315,12 +317,19 @@
(ISA_SEX ? raw_rom_insw(isa_itw(port), (u16 *)(buf), (nr)) : \
raw_rom_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
+#define isa_rom_insl(port, buf, nr) \
+ (ISA_SEX ? raw_rom_insl(isa_itl(port), (u32 *)(buf), (nr)) : \
+ raw_rom_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1))
+
#define isa_rom_outsb(port, buf, nr) raw_rom_outsb(isa_itb(port), (u8 *)(buf), (nr))
#define isa_rom_outsw(port, buf, nr) \
(ISA_SEX ? raw_rom_outsw(isa_itw(port), (u16 *)(buf), (nr)) : \
raw_rom_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
+#define isa_rom_outsl(port, buf, nr) \
+ (ISA_SEX ? raw_rom_outsl(isa_itl(port), (u32 *)(buf), (nr)) : \
+ raw_rom_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1))
#endif
#endif /* CONFIG_ISA */
@@ -421,8 +430,20 @@
#define insb isa_rom_insb
#define insw isa_rom_insw
+#define insl isa_rom_insl
#define outsb isa_rom_outsb
#define outsw isa_rom_outsw
+#define outsl isa_rom_outsl
+
+#define readb(addr) in_8(addr)
+#define writeb(val,addr) out_8((addr),(val))
+#define readw(addr) in_le16(addr)
+#define writew(val,addr) out_le16((addr),(val))
+#define readl(addr) in_le32(addr)
+#define writel(val,addr) out_le32((addr),(val))
+
+#define readsl(addr,buf,len) raw_insl((addr),(buf),(len))
+#define writesl(addr,buf,len) raw_outsl((addr),(buf),(len))
#endif
#if !defined(CONFIG_ISA) && !defined(CONFIG_PCI) && !defined(CONFIG_ATARI_ROM_ISA)
--- linux-m68k-2.6.21.orig/include/asm-m68k/raw_io.h 2007-06-04 18:13:50.000000000 +0200
+++ linux-m68k-2.6.21/include/asm-m68k/raw_io.h 2007-06-05 16:30:12.000000000 +0200
@@ -60,36 +60,82 @@
#define __raw_writew(val,addr) out_be16((addr),(val))
#define __raw_writel(val,addr) out_be32((addr),(val))
-/*
+/*
* Atari ROM port (cartridge port) ISA adapter, used for the EtherNEC NE2000
* network card driver.
- * The ISA adapter connects address lines A9-A13 to ISA address lines A0-A4,
- * and hardwires the rest of the ISA addresses for a base address of 0x300.
+ * The ISA adapter connects address lines A9-A13 to ISA address lines A0-A4,
+ * and hardwires the rest of the ISA addresses for a base address of 0x300.
*
- * Data lines D8-D15 are connected to ISA data lines D0-D7 for reading.
- * For writes, address lines A1-A8 are latched to ISA data lines D0-D7
- * (meaning the bit pattern on A1-A8 can be read back as byte).
+ * Data lines D8-D15 are connected to ISA data lines D0-D7 for reading.
+ * For writes, address lines A1-A8 are latched to ISA data lines D0-D7
+ * (meaning the bit pattern on A1-A8 can be read back as byte on D8-D15).
*
- * Reads and writes are byte only.
+ * Proper conversion of addr (i.e., shifting address bits 0-4 up by 9 bits)
+ * has to be taken care of by ISA address translation code in caller. The
+ * offset of 0x10000 in the write functions is the offset between read and
+ * write ROM base address (/ROM3 vs /ROM4)
+ *
+ * Reads and writes are byte only. Data arrive in the high byte of a word,
+ * hence the shifts.
+ *
+ * For word and longword accesses, emulate by byte-wise reads and shifts.
*/
#if defined(CONFIG_ATARI_ROM_ISA)
#define rom_in_8(addr) \
- ({ u16 __v = (*(__force volatile u16 *) (addr)); __v >>= 8; __v; })
+ ({ u16 __v = (*(__force volatile u16 *) (addr)); __v >>= 8; __v; })
#define rom_in_be16(addr) \
- ({ u16 __v = (*(__force volatile u16 *) (addr)); __v >>= 8; __v; })
+ ({ u16 __w = (*(__force volatile u16 *) (addr)); \
+ u16 __v = (*(__force volatile u16 *) (addr)); __w &= __v >> 8; __w; })
#define rom_in_be32(addr) \
- ({ u32 __v = (*(__force volatile u32 *) (addr)); __v >>= 8; __v; })
+ ({ u32 __y = (*(__force volatile u32 *) (addr)); \
+ u32 __x = (*(__force volatile u32 *) (addr)); \
+ u32 __w = (*(__force volatile u32 *) (addr)); \
+ u32 __v = (*(__force volatile u32 *) (addr)); __y &= __x >> 8; __w &= __v >> 8; __w &= __y << 16; __w; })
#define rom_in_le16(addr) \
- ({ u16 __v = le16_to_cpu(*(__force volatile u16 *) (addr)); __v >>= 8; __v; })
+ ({ u16 __v = (*(__force volatile u16 *) (addr)); \
+ u16 __w = (*(__force volatile u16 *) (addr)); __w &= __v >> 8; __w; })
#define rom_in_le32(addr) \
- ({ u32 __v = le32_to_cpu(*(__force volatile u32 *) (addr)); __v >>= 8; __v; })
-
-#define rom_out_8(addr,b) ({u8 __w, __v = (b); __w = ((*(__force volatile u8 *) ((addr) + 0x10000 + (__v<<1)))); })
-#define rom_out_be16(addr,w) ({u16 __w, __v = (w); __w = ((*(__force volatile u16 *) ((addr) + 0x10000 + (__v<<1)))); })
-#define rom_out_be32(addr,l) ({u32 __w, __v = (l); __w = ((*(__force volatile u32 *) ((addr) + 0x10000 + (__v<<1)))); })
-#define rom_out_le16(addr,w) ({u16 __w, __v = cpu_to_le16(w); __w = ((*(__force volatile u16 *) ((addr) + 0x10000 + (__v<<1)))); })
-#define rom_out_le32(addr,l) ({u32 __w, __v = cpu_to_le32(l); __w = ((*(__force volatile u32 *) ((addr) + 0x10000 + (__v<<1)))); })
+ ({ u32 __v = (*(__force volatile u32 *) (addr)); \
+ u32 __w = (*(__force volatile u32 *) (addr)); \
+ u32 __x = (*(__force volatile u32 *) (addr)); \
+ u32 __y = (*(__force volatile u32 *) (addr)); __y &= __x >> 8; __w &= __v >> 8; __w &= __y << 16; __w; })
+
+#define rom_out_8(addr,b) \
+ ({u8 __w, __v = (b); \
+ __w = ((*(__force volatile u8 *) ((addr) + 0x10000 + (__v<<1)))); })
+#define rom_out_be16(addr,w) \
+ ({u16 __w = (w), __v, __u; \
+ __v = __w >> 8; \
+ __u = ((*(__force volatile u16 *) ((addr) + 0x10000 + (__v<<1)))); \
+ __v = __w & 0x0f; \
+ __u = ((*(__force volatile u16 *) ((addr) + 0x10000 + (__v<<1)))); })
+#define rom_out_be32(addr,l) \
+ ({u32 __w = (l), __v, __u; \
+ __v = __w >> 24; \
+ __u = ((*(__force volatile u32 *) ((addr) + 0x10000 + (__v<<1)))); \
+ __v = (__w >> 16) & 0xff; \
+ __u = ((*(__force volatile u32 *) ((addr) + 0x10000 + (__v<<1)))); \
+ __v = (__w >> 8) & 0xff; \
+ __u = ((*(__force volatile u32 *) ((addr) + 0x10000 + (__v<<1)))); \
+ __v = __w & 0xff; \
+ __u = ((*(__force volatile u32 *) ((addr) + 0x10000 + (__v<<1)))); })
+#define rom_out_le16(addr,w) \
+ ({u16 __w = (w), __v, __u; \
+ __v = __w & 0xff; \
+ __u = ((*(__force volatile u16 *) ((addr) + 0x10000 + (__v<<1)))); \
+ __v = __w >> 8; \
+ __u = ((*(__force volatile u16 *) ((addr) + 0x10000 + (__v<<1)))); })
+#define rom_out_le32(addr,l) \
+ ({u32 __w = (l), __v, __u; \
+ __v = __w & 0xff; \
+ __u = ((*(__force volatile u32 *) ((addr) + 0x10000 + (__v<<1)))); \
+ __v = (__w >> 8) & 0xff; \
+ __u = ((*(__force volatile u32 *) ((addr) + 0x10000 + (__v<<1)))); \
+ __v = (__w >> 16) & 0xff; \
+ __u = ((*(__force volatile u32 *) ((addr) + 0x10000 + (__v<<1)))); \
+ __v = __w >> 24; \
+ __u = ((*(__force volatile u32 *) ((addr) + 0x10000 + (__v<<1)))); })
#define raw_rom_inb rom_in_8
#define raw_rom_inw rom_in_be16
