On Thu, 31 May 2007, Michael Schmitz wrote:
Note that both 16 and 32 bit accesses will return 8 bit results only, due
to the way the address and data bus are wired on the ROM ISA adapter. I
hope this is the correct behavior.
I don't think that's correct. Shouldn't 16-bit resp. 32-bit accesses be
emulated using 2 resp. 4 8-bit accesses instead?
OK, this emulates word and longword access by multiple byte accesses.
Goes on top of my previous patch (and should be included in the Debian
package).
+#define rom_out_8(addr,b) \
+ ({u8 __w, __v = (b); \
+ __w = ((*(__force volatile u8 *) ((addr) + 0x10000 + (__v<<1)))); })
+#define rom_out_be16(addr,w) \
+ ({u16 __w, __v; \
+ __v = (w) >> 8; \
+ __w = ((*(__force volatile u16 *) ((addr) + 0x10000 + (__v<<1)))); \
^^^
Shouldn't this and __w be u8? I though the hardware only did 8-bit
accesses?
+ __v = (w) & 0x0f; \
^^
ff?
+ __w = ((*(__force volatile u16 *) ((addr) + 0x10000 + (__v<<1)))); })
Woops, multiple use of `addr' and `w' in a macro can have nasty side-effects
(think e.g. `outw(addr++, value)'.
Wouldn't it be better to implement rom_out_be16() to use rom_out_8(),
for easier understanding of the code?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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