On Tue, Feb 27, 2024 at 10:58:06AM +0100, Maxime Chevallier wrote: > > + val = phy_read(phydev, PHYCR) & ~(LED_CNFG_1 | LED_CNFG_0); > > + switch (mode) { > > + case DP83640_LED_MODE_1: > > + val |= LED_CNFG_0; > > + break; > > + case DP83640_LED_MODE_2: > > + /* Keeping LED_CNFG_1 and LED_CNFG_0 unset */ > > + break; > > + case DP83640_LED_MODE_3: > > + val |= LED_CNFG_1; > > + break; > > + default: > > + return -EINVAL; > > + } > > + phy_write(phydev, PHYCR, val); This should also be phy_modify() as well. Any read-modify-write sequence is open to race conditions if it is open coded because the bus lock will be dropped after the read and regained on the write. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!