On Thu, 2021-06-03 at 16:03 +0200, Andrew Lunn wrote: > > I wanted to make the masking explicit, but since regmap-mdio currently > > requires > > a register address width of 5 bit, it could move there. > > > > Actually, can we safely assume that any MDIO driver implementing clause-22 > > access (5-bit register address width) will just ignore higher bits? In that > > case, I could just drop these functions and not even modify regmap-mdio. It > > appears to work for bitbanged MDIO. > > How are C45 addresses handled? The API to the MDIO bus driver uses a > register value which is 32 bits in width. Bit 30 indicates the address > is a C45 address, and then you have 21 bits of actual address. > regmap-mdio needs to be generic and support both C22 and C45. Currently regmap-mdio will only accept regmap_config structs where the register width is 5 bit, but this is not enforced for the reg_read/reg_write functions and the regnum is passed verbatim to mdiobus_read/mdiobus_write. So, if I understand correctly: * for a regmap configured for C22 access, register addresses should be masked with 0x1f to create a C22 regnum * for a regmap configured for C45 access, register addresses should be masked and formatted with (MII_ADDR_C45 | (mdiodev->addr << MII_DEVADDR_C45_SHIFT) | (reg_addr 0xffff)) I would think that a device that supports both C22 and C45 access, can then just be set up to have two regmaps. If they can be considered to be independent register spaces, one regmap for each access type would make sense to me. I'll cook up a patch for this. Best, Sander
