Hi! > Performing a SW reset is a bit tricky because the address for the SW > reset is different than the actual chip's address. This also means that > there's just one shared SWRST address for all chips which on that > particular I2C bus. We cannot therefore send the SWRST during each > chip's probe because doing that would reset all connected chips, > including those which we initialized before. This patch attempts to > solve this by trying to register the SWRST-only I2C address just once. > When probing for other chips, a failure to bind to this shared address > should not be fatal. > > This approach will still break on crazy setups with, e.g., a LTC4316 > address translator in between the bus master and the slave. I think that > this is acceptable and it's better than trying to bitmask the SWRST out > of the actual address from the DT, for example. > The SWRST address is special -- the datasheet says that the chip won't > ACK anything else the magic SWRST byte sequence. If that's indeed the > case, it might be possible to reuse this address by another I2C chip. > That's another scenario which this patch breaks -- the I2C "device" at > the magic I2C address will be marked as used, and nobody else can use it > without extra force. Ok, resetting seems like good idea, but the crazy way this reset is done tells me it should probably be opt-in via device-tree option? Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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