Quoting Christophe JAILLET (2021-05-01 04:24:32)
> 'clk_hw_set_rate_range()' does not return any error code and 'ret' is
> known to be 0 at this point, so this message can never be displayed.
>
> Remove it.
>
> Fixes: 3fde0e16d016 ("drivers: clk: Add ZynqMP clock driver")
> Signed-off-by: Christophe JAILLET <christophe.jaillet@xxxxxxxxxx>
> ---
Applied to clk-next
