On Sat, 01 May 2021 13:24:32 +0200, Christophe JAILLET wrote:
> 'clk_hw_set_rate_range()' does not return any error code and 'ret' is
> known to be 0 at this point, so this message can never be displayed.
>
> Remove it.
>
> Fixes: 3fde0e16d016 ("drivers: clk: Add ZynqMP clock driver")
> Signed-off-by: Christophe JAILLET <christophe.jaillet@xxxxxxxxxx>
Reviewed-by: Michael Tretter <m.tretter@xxxxxxxxxxxxxx>
> ---
> HOWEVER, the message is about 'clk_set_rate_range()', not
> 'clk_hw_set_rate_range()'. So the message is maybe correct and the
> 'xxx_rate_range()' function incorrect.
Thanks. The function is correct, as this is a clock provider and should use
the clk_hw. Removing the message is correct.
Michael
> ---
> drivers/clk/zynqmp/pll.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c
> index abe6afbf3407..af11e9400058 100644
> --- a/drivers/clk/zynqmp/pll.c
> +++ b/drivers/clk/zynqmp/pll.c
> @@ -331,8 +331,6 @@ struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id,
> }
>
> clk_hw_set_rate_range(hw, PS_PLL_VCO_MIN, PS_PLL_VCO_MAX);
> - if (ret < 0)
> - pr_err("%s:ERROR clk_set_rate_range failed %d\n", name, ret);
>
> return hw;
> }
> --
> 2.30.2
>
>
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