On Thu, Feb 23, 2023 at 06:41:43PM +0000, Krishna Yarlagadda wrote:
> > > + spi_bus_lock(phy->spi_device->master);
> > > +
> > > + while (len) {
> > Why?
> TPM supports max 64B in single transaction. Loop to send rest of it.
No, why is there a bus lock?
> > > + spi_xfer[0].tx_buf = phy->iobuf;
> > > + spi_xfer[0].len = 1;
> > > + spi_message_add_tail(&spi_xfer[0], &m);
> > > +
> > > + spi_xfer[1].tx_buf = phy->iobuf + 1;
> > > + spi_xfer[1].len = 3;
> > > + spi_message_add_tail(&spi_xfer[1], &m);
> > Why would we make these two separate transfers?
> Tegra QSPI combined sequence requires cmd, addr and data in different
> transfers. This eliminates need for additional flag for combined sequence.
That needs some documentation, and we might need a flag to ensure the
core doesn't coalesce the transfers.
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