>-----Original Message----- >From: srinivas pandruvada <srinivas.pandruvada@xxxxxxxxxxxxxxx> >Sent: Thursday, May 30, 2024 6:25 AM >To: Arnd Bergmann <arnd@xxxxxxxx>; Zhang, Lixu <lixu.zhang@xxxxxxxxx>; >Arnd Bergmann <arnd@xxxxxxxxxx>; Jiri Kosina <jikos@xxxxxxxxxx>; Benjamin >Tissoires <bentiss@xxxxxxxxxx> >Cc: linux-input@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx >Subject: Re: [PATCH 1/2] HID: intel-ish-hid: fix cache management mistake > >On Wed, 2024-05-29 at 09:06 +0200, Arnd Bergmann wrote: >> On Wed, May 29, 2024, at 08:46, Zhang, Lixu wrote: >> > > >> > >> > > + dma_wmb(); >> > I tested it on the platform, but it didn't wok. >> > >> >> What behavior do you see instead? Hi Arnd, please refer to the information below. >> If the manual cache flush works >> around a bug, that would indicate that the device itself is not >> coherent and the dma_alloc_coherent() in the architecture is broken. > >Lixu, > >What happens if you remove manual cache flush in your code? When the driver side sends the next start command, it receives an error response, which is likely because the bootloader failed to verify the firmware image. Thanks, Lixu >It is possible that boot loader at this time not ready to do fully coherent ops. > >Thanks, >Srinivas > >> Arnd
