Re: [Q] Frequency & duty cycle measurement?

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Hi,

On 2025. 02. 19. 23:32, Dipen Patel wrote:
On 1/21/25 7:19 AM, Csókás Bence wrote:
he hardware is capable of taking a snapshot of the timer value into another
dedicated register pair (RA, RB) on the rising/falling edges, and a small
`devmem`-based userspace utility was created as a working PoC
I am late to the party :) Seems above statement looks lot like what HTE
subsystem is doing. Right now, only userspace path is through the gpiolib
due to usage that time was limited to GPIOs. However, we can extend HTE to meet
this scenario.

Yes, I had the same impression. But since there was already a driver for this block in the counter subsystem, it was easier to extend that to our use case.

Thanks,
Best Regards,
Dipen Patel


Bence





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