On 07/01/25 11:13, Nayabbasha.Sayed@xxxxxxxxxxxxx wrote:
> On 04/01/25 19:08, Jonathan Cameron wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> On Fri, 03 Jan 2025 16:50:40 +0530
>> Nayab Sayed via B4 Relay <devnull+nayabbasha.sayed.microchip.com@xxxxxxxxxx> wrote:
>>
>>> From: Nayab Sayed <nayabbasha.sayed@xxxxxxxxxxxxx>
>>>
>>> The number of valid bits in SAMA7G5 ADC channel data register are 16.
>>> Hence changing the realbits value to 16
>>>
>>> Signed-off-by: Nayab Sayed <nayabbasha.sayed@xxxxxxxxxxxxx>
>> Please send an appropriate fixes tag so we know how far to backport.
>> In reply to this mail is fine (no need to send a v2 for that)
> Fixes: 840bf6cb983f: ("iio: adc: at91-sama5d2_adc: add support for
> sama7g5 device")
Small correction:
Fixes: 840bf6cb983f (iio: adc: at91-sama5d2_adc: add support for sama7g5
device)
Thanks,
Nayab
>
> Thanks,
> Nayab
>
>> Thanks,
>>
>> Jonathan
>>
>>> ---
>>> drivers/iio/adc/at91-sama5d2_adc.c | 68 ++++++++++++++++++++++----------------
>>> 1 file changed, 40 insertions(+), 28 deletions(-)
>>>
>>> diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c
>>> index 8e5aaf15a921..c3a1dea2aa82 100644
>>> --- a/drivers/iio/adc/at91-sama5d2_adc.c
>>> +++ b/drivers/iio/adc/at91-sama5d2_adc.c
>>> @@ -329,7 +329,7 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
>>> #define AT91_HWFIFO_MAX_SIZE_STR "128"
>>> #define AT91_HWFIFO_MAX_SIZE 128
>>>
>>> -#define AT91_SAMA5D2_CHAN_SINGLE(index, num, addr) \
>>> +#define AT91_SAMA_CHAN_SINGLE(index, num, addr, rbits) \
>>> { \
>>> .type = IIO_VOLTAGE, \
>>> .channel = num, \
>>> @@ -337,7 +337,7 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
>>> .scan_index = index, \
>>> .scan_type = { \
>>> .sign = 'u', \
>>> - .realbits = 14, \
>>> + .realbits = rbits, \
>>> .storagebits = 16, \
>>> }, \
>>> .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
>>> @@ -350,7 +350,13 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
>>> .indexed = 1, \
>>> }
>>>
>>> -#define AT91_SAMA5D2_CHAN_DIFF(index, num, num2, addr) \
>>> +#define AT91_SAMA5D2_CHAN_SINGLE(index, num, addr) \
>>> + AT91_SAMA_CHAN_SINGLE(index, num, addr, 14)
>>> +
>>> +#define AT91_SAMA7G5_CHAN_SINGLE(index, num, addr) \
>>> + AT91_SAMA_CHAN_SINGLE(index, num, addr, 16)
>>> +
>>> +#define AT91_SAMA_CHAN_DIFF(index, num, num2, addr, rbits) \
>>> { \
>>> .type = IIO_VOLTAGE, \
>>> .differential = 1, \
>>> @@ -360,7 +366,7 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
>>> .scan_index = index, \
>>> .scan_type = { \
>>> .sign = 's', \
>>> - .realbits = 14, \
>>> + .realbits = rbits, \
>>> .storagebits = 16, \
>>> }, \
>>> .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
>>> @@ -373,6 +379,12 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
>>> .indexed = 1, \
>>> }
>>>
>>> +#define AT91_SAMA5D2_CHAN_DIFF(index, num, num2, addr) \
>>> + AT91_SAMA_CHAN_DIFF(index, num, num2, addr, 14)
>>> +
>>> +#define AT91_SAMA7G5_CHAN_DIFF(index, num, num2, addr) \
>>> + AT91_SAMA_CHAN_DIFF(index, num, num2, addr, 16)
>>> +
>>> #define AT91_SAMA5D2_CHAN_TOUCH(num, name, mod) \
>>> { \
>>> .type = IIO_POSITIONRELATIVE, \
>>> @@ -666,30 +678,30 @@ static const struct iio_chan_spec at91_sama5d2_adc_channels[] = {
>>> };
>>>
>>> static const struct iio_chan_spec at91_sama7g5_adc_channels[] = {
>>> - AT91_SAMA5D2_CHAN_SINGLE(0, 0, 0x60),
>>> - AT91_SAMA5D2_CHAN_SINGLE(1, 1, 0x64),
>>> - AT91_SAMA5D2_CHAN_SINGLE(2, 2, 0x68),
>>> - AT91_SAMA5D2_CHAN_SINGLE(3, 3, 0x6c),
>>> - AT91_SAMA5D2_CHAN_SINGLE(4, 4, 0x70),
>>> - AT91_SAMA5D2_CHAN_SINGLE(5, 5, 0x74),
>>> - AT91_SAMA5D2_CHAN_SINGLE(6, 6, 0x78),
>>> - AT91_SAMA5D2_CHAN_SINGLE(7, 7, 0x7c),
>>> - AT91_SAMA5D2_CHAN_SINGLE(8, 8, 0x80),
>>> - AT91_SAMA5D2_CHAN_SINGLE(9, 9, 0x84),
>>> - AT91_SAMA5D2_CHAN_SINGLE(10, 10, 0x88),
>>> - AT91_SAMA5D2_CHAN_SINGLE(11, 11, 0x8c),
>>> - AT91_SAMA5D2_CHAN_SINGLE(12, 12, 0x90),
>>> - AT91_SAMA5D2_CHAN_SINGLE(13, 13, 0x94),
>>> - AT91_SAMA5D2_CHAN_SINGLE(14, 14, 0x98),
>>> - AT91_SAMA5D2_CHAN_SINGLE(15, 15, 0x9c),
>>> - AT91_SAMA5D2_CHAN_DIFF(16, 0, 1, 0x60),
>>> - AT91_SAMA5D2_CHAN_DIFF(17, 2, 3, 0x68),
>>> - AT91_SAMA5D2_CHAN_DIFF(18, 4, 5, 0x70),
>>> - AT91_SAMA5D2_CHAN_DIFF(19, 6, 7, 0x78),
>>> - AT91_SAMA5D2_CHAN_DIFF(20, 8, 9, 0x80),
>>> - AT91_SAMA5D2_CHAN_DIFF(21, 10, 11, 0x88),
>>> - AT91_SAMA5D2_CHAN_DIFF(22, 12, 13, 0x90),
>>> - AT91_SAMA5D2_CHAN_DIFF(23, 14, 15, 0x98),
>>> + AT91_SAMA7G5_CHAN_SINGLE(0, 0, 0x60),
>>> + AT91_SAMA7G5_CHAN_SINGLE(1, 1, 0x64),
>>> + AT91_SAMA7G5_CHAN_SINGLE(2, 2, 0x68),
>>> + AT91_SAMA7G5_CHAN_SINGLE(3, 3, 0x6c),
>>> + AT91_SAMA7G5_CHAN_SINGLE(4, 4, 0x70),
>>> + AT91_SAMA7G5_CHAN_SINGLE(5, 5, 0x74),
>>> + AT91_SAMA7G5_CHAN_SINGLE(6, 6, 0x78),
>>> + AT91_SAMA7G5_CHAN_SINGLE(7, 7, 0x7c),
>>> + AT91_SAMA7G5_CHAN_SINGLE(8, 8, 0x80),
>>> + AT91_SAMA7G5_CHAN_SINGLE(9, 9, 0x84),
>>> + AT91_SAMA7G5_CHAN_SINGLE(10, 10, 0x88),
>>> + AT91_SAMA7G5_CHAN_SINGLE(11, 11, 0x8c),
>>> + AT91_SAMA7G5_CHAN_SINGLE(12, 12, 0x90),
>>> + AT91_SAMA7G5_CHAN_SINGLE(13, 13, 0x94),
>>> + AT91_SAMA7G5_CHAN_SINGLE(14, 14, 0x98),
>>> + AT91_SAMA7G5_CHAN_SINGLE(15, 15, 0x9c),
>>> + AT91_SAMA7G5_CHAN_DIFF(16, 0, 1, 0x60),
>>> + AT91_SAMA7G5_CHAN_DIFF(17, 2, 3, 0x68),
>>> + AT91_SAMA7G5_CHAN_DIFF(18, 4, 5, 0x70),
>>> + AT91_SAMA7G5_CHAN_DIFF(19, 6, 7, 0x78),
>>> + AT91_SAMA7G5_CHAN_DIFF(20, 8, 9, 0x80),
>>> + AT91_SAMA7G5_CHAN_DIFF(21, 10, 11, 0x88),
>>> + AT91_SAMA7G5_CHAN_DIFF(22, 12, 13, 0x90),
>>> + AT91_SAMA7G5_CHAN_DIFF(23, 14, 15, 0x98),
>>> IIO_CHAN_SOFT_TIMESTAMP(24),
>>> AT91_SAMA5D2_CHAN_TEMP(AT91_SAMA7G5_ADC_TEMP_CHANNEL, "temp", 0xdc),
>>> };
>>>
>>> ---
>>> base-commit: 0bc21e701a6ffacfdde7f04f87d664d82e8a13bf
>>> change-id: 20250103-fix-sama7g5-adc-realbits-37f62f8925d7
>>>
>>> Best regards,
>
